llvm-6502/test/CodeGen/SPARC
Tim Northover 8f2a85e099 IR: add "cmpxchg weak" variant to support permitted failure.
This commit adds a weak variant of the cmpxchg operation, as described
in C++11. A cmpxchg instruction with this modifier is permitted to
fail to store, even if the comparison indicated it should.

As a result, cmpxchg instructions must return a flag indicating
success in addition to their original iN value loaded. Thus, for
uniformity *all* cmpxchg instructions now return "{ iN, i1 }". The
second flag is 1 when the store succeeded.

At the DAG level, a new ATOMIC_CMP_SWAP_WITH_SUCCESS node has been
added as the natural representation for the new cmpxchg instructions.
It is a strong cmpxchg.

By default this gets Expanded to the existing ATOMIC_CMP_SWAP during
Legalization, so existing backends should see no change in behaviour.
If they wish to deal with the enhanced node instead, they can call
setOperationAction on it. Beware: as a node with 2 results, it cannot
be selected from TableGen.

Currently, no use is made of the extra information provided in this
patch. Test updates are almost entirely adapting the input IR to the
new scheme.

Summary for out of tree users:
------------------------------

+ Legacy Bitcode files are upgraded during read.
+ Legacy assembly IR files will be invalid.
+ Front-ends must adapt to different type for "cmpxchg".
+ Backends should be unaffected by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210903 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-13 14:24:07 +00:00
..
64abi.ll TableGen: fix operand counting for aliases 2014-05-16 09:42:04 +00:00
64bit.ll TableGen: fix operand counting for aliases 2014-05-16 09:42:04 +00:00
64cond.ll TableGen: fix operand counting for aliases 2014-05-16 09:42:04 +00:00
64spill.ll [SparcV9] Use separate instruction patterns for 64 bit arithmetic instructions instead of reusing 32 bit instruction patterns. 2013-12-29 07:15:09 +00:00
2006-01-22-BitConvertLegalize.ll
2007-05-09-JumpTables.ll
2007-07-05-LiveIntervalAssert.ll
2008-10-10-InlineAsmMemoryOperand.ll
2008-10-10-InlineAsmRegOperand.ll
2009-08-28-PIC.ll [SparcV9] Use correct register class (I64RegClass) to hold the address of _GLOBAL_OFFSET_TABLE_ in sparcv9. 2014-01-29 03:35:08 +00:00
2009-08-28-WeakLinkage.ll
2011-01-11-Call.ll [Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated. 2014-01-10 02:55:27 +00:00
2011-01-11-CC.ll [Sparc] Do not emit nop after fcmp* instruction with V9. 2013-10-06 07:06:44 +00:00
2011-01-11-FrameAddr.ll TableGen: fix operand counting for aliases 2014-05-16 09:42:04 +00:00
2011-01-19-DelaySlot.ll TableGen: fix operand counting for aliases 2014-05-16 09:42:04 +00:00
2011-01-21-ByValArgs.ll Update to more CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change. 2013-07-18 22:47:09 +00:00
2011-01-22-SRet.ll Update to more CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change. 2013-07-18 22:47:09 +00:00
2011-12-03-TailDuplication.ll
2012-05-01-LowerArguments.ll
2013-05-17-CallFrame.ll [SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9. 2013-12-09 05:13:25 +00:00
atomics.ll IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
basictest.ll Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. 2013-07-14 06:24:09 +00:00
blockaddr.ll Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to function definitions for more informative error messages. No functionality change and all updated tests passed locally. 2013-07-14 06:24:09 +00:00
constpool.ll The SPARCv9 ABI returns a float in %f0. 2014-01-12 04:13:17 +00:00
ctpop.ll Only generate the popc instruction for SPARC CPUs that implement it. 2014-01-26 06:09:59 +00:00
DbgValueOtherTargets.test Remove unnecessary leading comment characters in lit-only file 2013-03-18 22:08:16 +00:00
exception.ll Remove the -disable-cfi option. 2014-05-05 17:33:26 +00:00
float.ll [SparcV9] Handle i64 <-> float conversions in sparcv9 mode. 2013-11-03 12:28:40 +00:00
fp128.ll Lower FNEG just like FABS to fneg[ds] and fmov[ds], thus avoiding 2014-02-27 19:26:29 +00:00
globals.ll [Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated. 2014-01-10 02:55:27 +00:00
inlineasm.ll [Sparc] Add support for inline assembly constraints which specify registers by their aliases. 2014-01-22 03:18:42 +00:00
leafproc.ll TableGen: fix operand counting for aliases 2014-05-16 09:42:04 +00:00
lit.local.cfg Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00
mature-mc-support.ll [Sparc] Add support for parsing directives in SparcAsmParser. 2014-03-01 02:18:04 +00:00
missinglabel.ll Handle bundled terminators in isBlockOnlyReachableByFallthrough. 2014-01-12 19:24:08 +00:00
mult-alt-generic-sparc.ll
obj-relocs.ll [Sparc] Remove spurious checks from a testcase. 2014-02-19 15:57:49 +00:00
parts.ll TableGen: fix operand counting for aliases 2014-05-16 09:42:04 +00:00
private.ll test/CodeGen/SPARC/private.ll: Fixup. Forgot to prune old RUN lines. 2012-07-03 04:29:20 +00:00
rem.ll [Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated. 2014-01-10 02:55:27 +00:00
setjmp.ll Remove the linker_private and linker_private_weak linkages. 2014-03-13 23:18:37 +00:00
spillsize.ll Always let value types influence register classes. 2014-01-14 06:18:38 +00:00
sret-secondary.ll Allow sret on the second parameter as well as the first 2014-05-09 22:32:13 +00:00
tls.ll [Sparc] Emit relocations for Thread Local Storage (TLS) when integrated assembler is used. 2014-02-07 05:54:20 +00:00
trap.ll SPARC: Implement TRAP lowering. Matches what GCC emits. 2014-02-23 21:43:52 +00:00
varargs.ll Sparc: Mark functions calling llvm.vastart and llvm.returnaddress intrinsics as non-leaf functions. 2013-06-01 20:42:48 +00:00