Tim Northover 8af3f965e0 ARM: do not relax Thumb1 -> Thumb2 if only Thumb1 is available. ... After recognising that a certain narrow instruction might need a relocation to be represented, we used to unconditionally relax it to a Thumb2 instruction to permit this. Unfortunately, some CPUs (e.g. v6m) don't even have most Thumb2 instructions, so we end up emitting a completely invalid instruction. Theoretically, ELF does have relocations for these situations; but they are fairly unusable with such short ranges and the ABI document even says they're documented "for completeness". So an error is probably better there too. rdar://20391953 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234195 91177308-0d34-0410-b5e6-96231b3b80d8		2015-04-06 18:44:42 +00:00
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AArch64
ARM	ARM: do not relax Thumb1 -> Thumb2 if only Thumb1 is available.	2015-04-06 18:44:42 +00:00
AsmParser
COFF
Disassembler
ELF	Use a comma after the unique keyword.	2015-04-06 16:34:41 +00:00
Hexagon
MachO	MC: For variable symbols, maintain MCSymbol::Section as a cache.	2015-04-03 01:46:11 +00:00
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