Andrew Trick 38e61122f2 Added MachineSchedPolicy. ... Allow subtargets to customize the generic scheduling strategy. This is convenient for targets that don't need to add new heuristics by specializing the strategy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190176 91177308-0d34-0410-b5e6-96231b3b80d8		2013-09-06 17:32:34 +00:00
..
CostTable.h	Add a overload to CostTable which allows it to infer the size of the table.	2013-08-09 19:33:32 +00:00
Mangler.h	Use proper section suffix for COFF weak symbols	2013-07-29 13:58:39 +00:00
Target.td	ARM: use TableGen patterns to select CMOV operations.	2013-08-22 09:57:11 +00:00
TargetCallingConv.h
TargetCallingConv.td	Add an OtherPreserved field to the CalleeSaved TableGen class.	2013-08-23 02:25:47 +00:00
TargetFrameLowering.h	[SystemZ] Clean up register scavenging code	2013-07-05 12:55:00 +00:00
TargetInstrInfo.h	mi-sched: Load clustering is a bit to expensive to enable unconditionally.	2013-09-04 21:00:08 +00:00
TargetIntrinsicInfo.h
TargetItinerary.td
TargetJITInfo.h
TargetLibraryInfo.h	[SystemZ] Use SRST to optimize memchr	2013-08-20 09:38:48 +00:00
TargetLowering.h	SelectionDAG: Use correct pointer size when lowering function arguments v2	2013-08-26 15:05:36 +00:00
TargetLoweringObjectFile.h	[DebugInfo] Allow getDebugThreadLocalSymbol to return MCExpr	2013-07-02 18:47:09 +00:00
TargetMachine.h	Directly access objects which may change during compilation.	2013-06-17 20:41:25 +00:00
TargetOpcodes.h
TargetOptions.h	Use function attributes to indicate that we don't want to realign the stack.	2013-08-01 21:42:05 +00:00
TargetRegisterInfo.h	PrintVRegOrUnit	2013-08-23 17:48:53 +00:00
TargetSchedule.td
TargetSelectionDAG.td	Inplement aarch64 neon instructions in AdvSIMD(shift). About 24 shift instructions:	2013-09-04 09:28:24 +00:00
TargetSelectionDAGInfo.h	[SystemZ] Use SRST to optimize memchr	2013-08-20 09:38:48 +00:00
TargetSubtargetInfo.h	Added MachineSchedPolicy.	2013-09-06 17:32:34 +00:00