llvm-6502/lib/CodeGen
Chris Lattner 0ea26ca45b Expand 64-bit shifts more optimally if we know that the high bit of the
shift amount is one or zero.  For example, for:

long long foo1(long long X, int C) {
  return X << (C|32);
}

long long foo2(long long X, int C) {
  return X << (C&~32);
}

we get:

_foo1:
        movb $31, %cl
        movl 4(%esp), %edx
        andb 12(%esp), %cl
        shll %cl, %edx
        xorl %eax, %eax
        ret
_foo2:
        movb $223, %cl
        movl 4(%esp), %eax
        movl 8(%esp), %edx
        andb 12(%esp), %cl
        shldl %cl, %eax, %edx
        shll %cl, %eax
        ret

instead of:

_foo1:
        subl $4, %esp
        movl %ebx, (%esp)
        movb $32, %bl
        movl 8(%esp), %eax
        movl 12(%esp), %edx
        movb %bl, %cl
        orb 16(%esp), %cl
        shldl %cl, %eax, %edx
        shll %cl, %eax
        xorl %ecx, %ecx
        testb %bl, %bl
        cmovne %eax, %edx
        cmovne %ecx, %eax
        movl (%esp), %ebx
        addl $4, %esp
        ret
_foo2:
        subl $4, %esp
        movl %ebx, (%esp)
        movb $223, %cl
        movl 8(%esp), %eax
        movl 12(%esp), %edx
        andb 16(%esp), %cl
        shldl %cl, %eax, %edx
        shll %cl, %eax
        xorl %ecx, %ecx
        xorb %bl, %bl
        testb %bl, %bl
        cmovne %eax, %edx
        cmovne %ecx, %eax
        movl (%esp), %ebx
        addl $4, %esp
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30506 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-20 03:38:48 +00:00
..
SelectionDAG Expand 64-bit shifts more optimally if we know that the high bit of the 2006-09-20 03:38:48 +00:00
AsmPrinter.cpp oops 2006-09-18 18:00:18 +00:00
BranchFolding.cpp Remove trailing whitespace 2005-04-21 22:36:52 +00:00
DwarfWriter.cpp Sort out mangled names for globals 2006-09-18 14:47:26 +00:00
ELFWriter.cpp Refactor a bunch of includes so that TargetMachine.h doesn't have to include 2006-05-12 06:33:49 +00:00
IntrinsicLowering.cpp Handle new forms of llvm.dbg intrinsics. 2006-03-23 18:06:46 +00:00
LiveInterval.cpp When joining two intervals where the RHS is really simple, use a light-weight 2006-09-02 05:26:59 +00:00
LiveIntervalAnalysis.cpp Keep track of the start of MBB's in a separate map from instructions. This 2006-09-15 03:57:23 +00:00
LiveVariables.cpp Only call isUse/isDef on register operands 2006-09-05 20:19:27 +00:00
LLVMTargetMachine.cpp add setJumpBufSize() and setJumpBufAlignment() to target-lowering. 2006-09-04 06:21:35 +00:00
MachineBasicBlock.cpp Refactor a bunch of includes so that TargetMachine.h doesn't have to include 2006-05-12 06:33:49 +00:00
MachineDebugInfo.cpp Adding C++ member support. 2006-08-21 21:20:18 +00:00
MachineFunction.cpp Use getOffset() instead. 2006-09-14 07:41:12 +00:00
MachineInstr.cpp Only call isUse/isDef on register operands 2006-09-05 20:19:27 +00:00
MachinePassRegistry.cpp Final polish on machine pass registries. 2006-08-02 12:30:23 +00:00
MachOWriter.cpp Behold, more work on relocations. Things are looking pretty good now. 2006-09-10 23:03:44 +00:00
Makefile Fix linking on Alpha 2006-07-20 17:27:58 +00:00
Passes.cpp Work around a bug in gcc 3.3.5, reported by a user 2006-08-03 00:16:56 +00:00
PHIElimination.cpp s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| 2006-08-27 12:54:02 +00:00
PhysRegTracker.h Improved PhysRegTracker interface. RegAlloc lazily allocates the register tracker using a std::auto_ptr 2004-02-23 06:10:13 +00:00
PrologEpilogInserter.cpp s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| 2006-08-27 12:54:02 +00:00
RegAllocLinearScan.cpp s|llvm/Support/Visibility.h|llvm/Support/Compiler.h| 2006-08-27 12:54:02 +00:00
RegAllocLocal.cpp Fix UnitTests/2005-05-12-Int64ToFP.c with llc-beta. In particular, do not 2006-09-19 18:02:01 +00:00
RegAllocSimple.cpp Fix a long-standing wart in the code generator: two-address instruction lowering 2006-09-05 02:12:02 +00:00
TwoAddressInstructionPass.cpp Fix a long-standing wart in the code generator: two-address instruction lowering 2006-09-05 02:12:02 +00:00
UnreachableBlockElim.cpp eliminate RegisterOpt. It does the same thing as RegisterPass. 2006-08-27 22:42:52 +00:00
VirtRegMap.cpp Fix a long-standing wart in the code generator: two-address instruction lowering 2006-09-05 02:12:02 +00:00
VirtRegMap.h Fix a long-standing wart in the code generator: two-address instruction lowering 2006-09-05 02:12:02 +00:00