Hal Finkel 0ef8f3189e [PowerPC] Enable speculation of cttz/ctlz ...

PPC has an instruction for ctlz with defined zero behavior, and our lowering of
cttz (provided by DAGCombine) is also efficient and branchless, so speculating
these makes sense.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225150 91177308-0d34-0410-b5e6-96231b3b80d8

2015-01-05 05:24:42 +00:00

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AArch64

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ARM

ARM: permit tail calls to weak externals on COFF

2015-01-03 21:35:00 +00:00

CPP

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Generic

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Hexagon

[Hexagon] Adding reg-reg indexed load forms.

2014-12-30 18:58:47 +00:00

Inputs

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Mips

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MSP430

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NVPTX

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PowerPC

[PowerPC] Enable speculation of cttz/ctlz

2015-01-05 05:24:42 +00:00

R600

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SPARC

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SystemZ

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Thumb

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Thumb2

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X86

[X86][SSE] Added vector packing test for pr12412

2015-01-04 19:08:03 +00:00

XCore

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