llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-11-14 13:07:31 +00:00

History

Bill Wendling 0f8d9c04d9 Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If not, then there is the potential for the stack to be changed while the stack's being used by another instruction (like a call). This can only result in tears... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44037 91177308-0d34-0410-b5e6-96231b3b80d8		2007-11-13 00:44:25 +00:00
..
IA64.h
IA64.td
IA64AsmPrinter.cpp	Eliminate the remaining uses of getTypeSize. This	2007-11-05 00:04:43 +00:00
IA64Bundling.cpp
IA64InstrBuilder.h
IA64InstrFormats.td	Change instruction description to split OperandList into OutOperandList and	2007-07-19 01:14:50 +00:00
IA64InstrInfo.cpp	RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.	2007-05-18 00:05:48 +00:00
IA64InstrInfo.h	RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.	2007-05-18 00:05:48 +00:00
IA64InstrInfo.td	No more noResults.	2007-07-21 00:34:19 +00:00
IA64ISelDAGToDAG.cpp	Revise per review of previous patch.	2007-08-31 17:03:33 +00:00
IA64ISelLowering.cpp	Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack	2007-11-13 00:44:25 +00:00
IA64ISelLowering.h	More explicit keywords.	2007-08-02 21:21:54 +00:00
IA64MachineFunctionInfo.h
IA64RegisterInfo.cpp	Use TableGen to emit information for dwarf register numbers.	2007-11-11 19:50:10 +00:00
IA64RegisterInfo.h	Use TableGen to emit information for dwarf register numbers.	2007-11-11 19:50:10 +00:00
IA64RegisterInfo.td	Use TableGen to emit information for dwarf register numbers.	2007-11-11 19:50:10 +00:00
IA64TargetAsmInfo.cpp
IA64TargetAsmInfo.h	More explicit keywords.	2007-09-25 20:27:06 +00:00
IA64TargetMachine.cpp	long double patch 2 of N. Handle it in TargetData.	2007-08-03 20:20:50 +00:00
IA64TargetMachine.h
Makefile
README	If a function is vararg, never pass inreg arguments in registers. Thanks to	2007-06-19 00:13:10 +00:00

README

*** README for the LLVM IA64 Backend "Version 0.01" - March 18, 2005
*** Quote for this version:

      "Kaori and Hitomi are naughty!!"


Congratulations, you have found:

**************************************************************** 
* @@@       @@@       @@@  @@@  @@@@@@@@@@                     *
* @@@       @@@       @@@  @@@  @@@@@@@@@@@                    *
* @@!       @@!       @@!  @@@  @@! @@! @@!                    *
* !@!       !@!       !@!  @!@  !@! !@! !@!                    *
* @!!       @!!       @!@  !@!  @!! !!@ @!@                    *
* !!!       !!!       !@!  !!!  !@!   ! !@!                    *
* !!:       !!:       :!:  !!:  !!:     !!:                    *
*  :!:       :!:       ::!!:!   :!:     :!:                    *
*  :: ::::   :: ::::    ::::    :::     ::                     *
* : :: : :  : :: : :     :       :      :                      *
*                                                              *
*                                                              *
*  @@@@@@   @@@  @@@       @@@   @@@@@@     @@@@@@       @@@   *
* @@@@@@@@  @@@@ @@@       @@@  @@@@@@@@   @@@@@@@      @@@@   *
* @@!  @@@  @@!@!@@@       @@!  @@!  @@@  !@@          @@!@!   *
* !@!  @!@  !@!!@!@!       !@!  !@!  @!@  !@!         !@!!@!   *
* @!@  !@!  @!@ !!@!       !!@  @!@!@!@!  !!@@!@!    @!! @!!   *
* !@!  !!!  !@!  !!!       !!!  !!!@!!!!  @!!@!!!!  !!!  !@!   *
* !!:  !!!  !!:  !!!       !!:  !!:  !!!  !:!  !:!  :!!:!:!!:  *
* :!:  !:!  :!:  !:!       :!:  :!:  !:!  :!:  !:!  !:::!!:::  *
* ::::: ::   ::   ::        ::  ::   :::  :::: :::       :::   *
*  : :  :   ::    :        :     :   : :   :: : :        :::   *
*                                                              *
****************************************************************
* Bow down, bow down, before the power of IA64! Or be crushed, *
* be crushed, by its jolly registers of doom!!                 *
****************************************************************

DEVELOPMENT PLAN:

   _  you are       2005           maybe 2005       2006            2006 and
  /   here            |               |              |               beyond 
 v                    v               v              v                |
                                                                      v
CLEAN UP        ADD INSTRUCTION      ADD          PLAY WITH
INSTRUCTION --> SCHEDULING AND  -->  JIT    -->    DYNAMIC     --> FUTURE WORK
SELECTION       BUNDLING            SUPPORT     REOPTIMIZATION

DISCLAIMER AND PROMISE:

As of the time of this release, you are probably better off using Intel C/C++
or GCC. The performance of the code emitted right now is, in a word,
terrible. Check back in a few months - the story will be different then,
I guarantee it.

TODO:

  - stop passing FP args in both FP *and* integer regs when not required
  - allocate low (nonstacked) registers more aggressively
  - clean up and thoroughly test the isel patterns.
  - fix stacked register allocation order: (for readability) we don't want
    the out? registers being the first ones used
  - fix up floating point
    (nb http://gcc.gnu.org/wiki?pagename=ia64%20floating%20point )
  - bundling!
    (we will avoid the mess that is:
     http://gcc.gnu.org/ml/gcc/2003-12/msg00832.html )
  - instruction scheduling (hmmmm! ;)
  - write truly inspirational documentation
  - if-conversion (predicate database/knowledge? etc etc)
  - counted loop support
  - make integer + FP mul/div more clever (we have fixed pseudocode atm)
  - track and use comparison complements

INFO:

  - we are strictly LP64 here, no support for ILP32 on HP-UX. Linux users
    don't need to worry about this.
  - i have instruction scheduling/bundling pseudocode, that really works
    (has been tested, albeit at the perl-script level).
    so, before you go write your own, send me an email!

KNOWN DEFECTS AT THE CURRENT TIME:

  - C++ vtables contain naked function pointers, not function descriptors,
  which is bad. see http://llvm.cs.uiuc.edu/bugs/show_bug.cgi?id=406
  - varargs are broken
  - alloca doesn't work (indeed, stack frame layout is bogus)
  - no support for big-endian environments
  - (not really the backend, but...) the CFE has some issues on IA64.
    these will probably be fixed soon.
  
ACKNOWLEDGEMENTS:

  - Chris Lattner (x100)
  - Other LLVM developers ("hey, that looks familiar")

CONTACT:

  - You can email me at duraid@octopus.com.au. If you find a small bug,
    just email me. If you find a big bug, please file a bug report
    in bugzilla! http://llvm.cs.uiuc.edu is your one stop shop for all
    things LLVM.