llvm-6502/test/ExecutionEngine/OrcMCJIT/2003-08-23-RegisterAllocatePhysReg.ll
Lang Hames 47fd5639bc [Orc][lli] Add a very simple Orc-based lazy JIT to lli.
This ensures that we're building and testing the CompileOnDemand layer, at least
in a basic way.

Currently x86-64 only, and with limited to no library calls enabled (depending
on host platform). Patches welcome. ;)

To enable access to the lazy JIT, this patch replaces the '-use-orcmcjit' lli
option with a new option:
'-jit-kind={ mcjit | orc-mcjit | orc-lazy }'.

All regression tests are updated to use the new option, and one trivial test of
the new lazy JIT is added.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233182 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-25 12:11:48 +00:00

35 lines
1.1 KiB
LLVM

; RUN: %lli -jit-kind=orc-mcjit %s > /dev/null
; This testcase exposes a bug in the local register allocator where it runs out
; of registers (due to too many overlapping live ranges), but then attempts to
; use the ESP register (which is not allocatable) to hold a value.
define i32 @main(i32 %A) {
; ESP gets used again...
%Ap2 = alloca i32, i32 %A ; <i32*> [#uses=11]
; Produce lots of overlapping live ranges
%B = add i32 %A, 1 ; <i32> [#uses=1]
%C = add i32 %A, 2 ; <i32> [#uses=1]
%D = add i32 %A, 3 ; <i32> [#uses=1]
%E = add i32 %A, 4 ; <i32> [#uses=1]
%F = add i32 %A, 5 ; <i32> [#uses=1]
%G = add i32 %A, 6 ; <i32> [#uses=1]
%H = add i32 %A, 7 ; <i32> [#uses=1]
%I = add i32 %A, 8 ; <i32> [#uses=1]
%J = add i32 %A, 9 ; <i32> [#uses=1]
%K = add i32 %A, 10 ; <i32> [#uses=1]
; Uses of all of the values
store i32 %A, i32* %Ap2
store i32 %B, i32* %Ap2
store i32 %C, i32* %Ap2
store i32 %D, i32* %Ap2
store i32 %E, i32* %Ap2
store i32 %F, i32* %Ap2
store i32 %G, i32* %Ap2
store i32 %H, i32* %Ap2
store i32 %I, i32* %Ap2
store i32 %J, i32* %Ap2
store i32 %K, i32* %Ap2
ret i32 0
}