Arnold Schwaighofer 101a36117c ARM ISel: Don't create illegal types during LowerMUL ... The transformation happening here is that we want to turn a "mul(ext(X), ext(X))" into a "vmull(X, X)", stripping off the extension. We have to make sure that X still has a valid vector type - possibly recreate an extension to a smaller type. In case of a extload of a memory type smaller than 64 bit we used create a ext(load()). The problem with doing this - instead of recreating an extload - is that an illegal type is exposed. This patch fixes this by creating extloads instead of ext(load()) sequences. Fixes PR15970. radar://13871383 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181842 91177308-0d34-0410-b5e6-96231b3b80d8		2013-05-14 22:33:24 +00:00
..
Analysis
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Assembler
Bindings/Ocaml
Bitcode
BugPoint
CodeGen	ARM ISel: Don't create illegal types during LowerMUL	2013-05-14 22:33:24 +00:00
DebugInfo	Give the test from r181632 a target triple.	2013-05-10 22:14:39 +00:00
ExecutionEngine	XFAIL this test for mingw too.	2013-05-13 00:18:24 +00:00
Feature
FileCheck	Add 'CHECK-DAG' support	2013-05-14 20:34:12 +00:00
Instrumentation
Integer
JitListener
Linker
MC	Implement the PowerPC system call (sc) instruction.	2013-05-14 19:35:45 +00:00
Object	Change getRelocationAdditionalInfo to be ELF only.	2013-05-09 03:39:05 +00:00
Other
TableGen
tools
Transforms	GlobalOpt: fix an issue where CXAAtExitFn points to a deleted function.	2013-05-14 21:52:44 +00:00
Unit
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