Juergen Ributzka a0af4b0271 [FastISel][AArch64] Fold sign-/zero-extends into the load instruction. ... The sign-/zero-extension of the loaded value can be performed by the memory instruction for free. If the result of the load has only one use and the use is a sign-/zero-extend, then we emit the proper load instruction. The extend is only a register copy and will be optimized away later on. Other instructions that consume the sign-/zero-extended value are also made aware of this fact, so they don't fold the extend too. This fixes rdar://problem/18495928. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218653 91177308-0d34-0410-b5e6-96231b3b80d8		2014-09-30 00:49:58 +00:00
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CodeGen	[FastISel][AArch64] Fold sign-/zero-extends into the load instruction.	2014-09-30 00:49:58 +00:00
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MC	WinCOFFObjectWriter: optimize the string table for common suffices	2014-09-29 22:43:20 +00:00
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Transforms	[AArch64] Improve cost model to handle sdiv by a pow-of-two.	2014-09-29 13:59:31 +00:00
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