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https://github.com/c64scene-ar/llvm-6502.git
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d29bae8bc9
Substantial SelectionDAG scheduling is going away soon, and is interfering with Hao's attempts to implement LDn/STn instructions, so I say we make the leap first. There were a few reorderings (inevitably) which broke some tests. I tried to replace them with CHECK-DAG variants mostly, but some too complex for that to be useful and I just reordered them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192282 91177308-0d34-0410-b5e6-96231b3b80d8
152 lines
3.7 KiB
LLVM
152 lines
3.7 KiB
LLVM
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
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define i32 @test_floattoi32(float %in) {
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; CHECK-LABEL: test_floattoi32:
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%signed = fptosi float %in to i32
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%unsigned = fptoui float %in to i32
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; CHECK-DAG: fcvtzu [[UNSIG:w[0-9]+]], {{s[0-9]+}}
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; CHECK-DAG: fcvtzs [[SIG:w[0-9]+]], {{s[0-9]+}}
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%res = sub i32 %signed, %unsigned
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; CHECK: sub {{w[0-9]+}}, [[SIG]], [[UNSIG]]
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ret i32 %res
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; CHECK: ret
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}
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define i32 @test_doubletoi32(double %in) {
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; CHECK-LABEL: test_doubletoi32:
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%signed = fptosi double %in to i32
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%unsigned = fptoui double %in to i32
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; CHECK-DAG: fcvtzu [[UNSIG:w[0-9]+]], {{d[0-9]+}}
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; CHECK-DAG: fcvtzs [[SIG:w[0-9]+]], {{d[0-9]+}}
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%res = sub i32 %signed, %unsigned
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; CHECK: sub {{w[0-9]+}}, [[SIG]], [[UNSIG]]
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ret i32 %res
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; CHECK: ret
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}
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define i64 @test_floattoi64(float %in) {
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; CHECK-LABEL: test_floattoi64:
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%signed = fptosi float %in to i64
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%unsigned = fptoui float %in to i64
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; CHECK-DAG: fcvtzu [[UNSIG:x[0-9]+]], {{s[0-9]+}}
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; CHECK-DAG: fcvtzs [[SIG:x[0-9]+]], {{s[0-9]+}}
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%res = sub i64 %signed, %unsigned
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; CHECK: sub {{x[0-9]+}}, [[SIG]], [[UNSIG]]
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ret i64 %res
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; CHECK: ret
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}
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define i64 @test_doubletoi64(double %in) {
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; CHECK-LABEL: test_doubletoi64:
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%signed = fptosi double %in to i64
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%unsigned = fptoui double %in to i64
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; CHECK-DAG: fcvtzu [[UNSIG:x[0-9]+]], {{d[0-9]+}}
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; CHECK-DAG: fcvtzs [[SIG:x[0-9]+]], {{d[0-9]+}}
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%res = sub i64 %signed, %unsigned
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; CHECK: sub {{x[0-9]+}}, [[SIG]], [[UNSIG]]
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ret i64 %res
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; CHECK: ret
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}
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define float @test_i32tofloat(i32 %in) {
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; CHECK-LABEL: test_i32tofloat:
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%signed = sitofp i32 %in to float
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%unsigned = uitofp i32 %in to float
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; CHECK-DAG: ucvtf [[UNSIG:s[0-9]+]], {{w[0-9]+}}
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; CHECK-DAG: scvtf [[SIG:s[0-9]+]], {{w[0-9]+}}
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%res = fsub float %signed, %unsigned
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; CHECL: fsub {{s[0-9]+}}, [[SIG]], [[UNSIG]]
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ret float %res
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; CHECK: ret
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}
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define double @test_i32todouble(i32 %in) {
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; CHECK-LABEL: test_i32todouble:
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%signed = sitofp i32 %in to double
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%unsigned = uitofp i32 %in to double
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; CHECK-DAG: ucvtf [[UNSIG:d[0-9]+]], {{w[0-9]+}}
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; CHECK-DAG: scvtf [[SIG:d[0-9]+]], {{w[0-9]+}}
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%res = fsub double %signed, %unsigned
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; CHECK: fsub {{d[0-9]+}}, [[SIG]], [[UNSIG]]
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ret double %res
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; CHECK: ret
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}
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define float @test_i64tofloat(i64 %in) {
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; CHECK-LABEL: test_i64tofloat:
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%signed = sitofp i64 %in to float
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%unsigned = uitofp i64 %in to float
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; CHECK-DAG: ucvtf [[UNSIG:s[0-9]+]], {{x[0-9]+}}
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; CHECK-DAG: scvtf [[SIG:s[0-9]+]], {{x[0-9]+}}
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%res = fsub float %signed, %unsigned
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; CHECK: fsub {{s[0-9]+}}, [[SIG]], [[UNSIG]]
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ret float %res
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; CHECK: ret
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}
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define double @test_i64todouble(i64 %in) {
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; CHECK-LABEL: test_i64todouble:
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%signed = sitofp i64 %in to double
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%unsigned = uitofp i64 %in to double
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; CHECK-DAG: ucvtf [[UNSIG:d[0-9]+]], {{x[0-9]+}}
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; CHECK-DAG: scvtf [[SIG:d[0-9]+]], {{x[0-9]+}}
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%res = fsub double %signed, %unsigned
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; CHECK: sub {{d[0-9]+}}, [[SIG]], [[UNSIG]]
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ret double %res
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; CHECK: ret
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}
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define i32 @test_bitcastfloattoi32(float %in) {
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; CHECK-LABEL: test_bitcastfloattoi32:
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%res = bitcast float %in to i32
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; CHECK: fmov {{w[0-9]+}}, {{s[0-9]+}}
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ret i32 %res
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}
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define i64 @test_bitcastdoubletoi64(double %in) {
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; CHECK-LABEL: test_bitcastdoubletoi64:
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%res = bitcast double %in to i64
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; CHECK: fmov {{x[0-9]+}}, {{d[0-9]+}}
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ret i64 %res
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}
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define float @test_bitcasti32tofloat(i32 %in) {
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; CHECK-LABEL: test_bitcasti32tofloat:
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%res = bitcast i32 %in to float
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; CHECK: fmov {{s[0-9]+}}, {{w[0-9]+}}
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ret float %res
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}
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define double @test_bitcasti64todouble(i64 %in) {
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; CHECK-LABEL: test_bitcasti64todouble:
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%res = bitcast i64 %in to double
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; CHECK: fmov {{d[0-9]+}}, {{x[0-9]+}}
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ret double %res
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}
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