llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-23 05:29:23 +00:00

History

Bill Schmidt 11abe69e98 [PPC64] Add support for the ICBT instruction on POWER8.

Patch by Kit Barton.

Support for the ICBT instruction is currently present, but limited to
embedded processors. This change adds a new FeatureICBT that can be used
to identify whether the ICBT instruction is available on a specific processor.

Two new tests are added:
 * Positive test to ensure the icbt instruction is present when using
-mcpu=pwr8
 * Negative test to ensure the icbt instruction is not generated when
using -mcpu=pwr7

Both test cases use the Prefetch opcode in LLVM. They are based on the
ppc64-prefetch.ll test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226033 91177308-0d34-0410-b5e6-96231b3b80d8

2015-01-14 20:17:10 +00:00

AArch64

Fix PR22179.

2015-01-10 23:41:24 +00:00

ARM

ARM: add test for crc32 instructions in CodeGen.

2015-01-14 01:43:33 +00:00

CPP

…

Generic

CodeGen: do not attempt to invalidate virtual registers for zero-sized phis.

2014-12-19 20:50:07 +00:00