Owen Anderson 1300f3019e Change the REG_SEQUENCE SDNode to take an explict register class ID as its first operand. This operand is lowered away by the time we reach MachineInstrs, so the actual register-allocation handling of them doesn't need to change.
This is intended to support using REG_SEQUENCE SDNode's with type MVT::untyped, and is part of the long road to eliminating some of the hacks we currently use to support register pairs and other strange constraints, particularly on ARM NEON.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133178 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-16 18:17:13 +00:00
2011-06-12 15:26:54 +00:00
2011-06-16 16:03:13 +00:00
2011-06-16 18:13:57 +00:00
2011-06-16 16:52:24 +00:00
2011-06-12 15:26:54 +00:00
2011-06-12 15:26:54 +00:00

Low Level Virtual Machine (LLVM)
================================

This directory and its subdirectories contain source code for the Low Level
Virtual Machine, a toolkit for the construction of highly optimized compilers,
optimizers, and runtime environments.

LLVM is open source software. You may freely distribute it under the terms of
the license agreement found in LICENSE.txt.

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Description
LLVM backend for 6502
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