llvm-6502/lib/CodeGen/SelectionDAG
Michael Liao 13429e224c Teach DAG combine to fold (extract_subvec (concat v1, ..) i) to v_i
- If the extracted vector has the same type of all vectored being concatenated
  together, it should be simplified directly into v_i, where i is the index of
  the element being extracted.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166125 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-17 20:48:33 +00:00
..
CMakeLists.txt
DAGCombiner.cpp Teach DAG combine to fold (extract_subvec (concat v1, ..) i) to v_i 2012-10-17 20:48:33 +00:00
FastISel.cpp
FunctionLoweringInfo.cpp
InstrEmitter.cpp
InstrEmitter.h
LegalizeDAG.cpp Legalizer optimize a pair of div / mod to a call to divrem libcall if they are 2012-10-12 01:15:47 +00:00
LegalizeFloatTypes.cpp
LegalizeIntegerTypes.cpp
LegalizeTypes.cpp
LegalizeTypes.h
LegalizeTypesGeneric.cpp Fix big-endian codegen bug in DAGTypeLegalizer::ExpandRes_BITCAST 2012-10-12 15:42:58 +00:00
LegalizeVectorOps.cpp
LegalizeVectorTypes.cpp
LLVMBuild.txt
Makefile
ResourcePriorityQueue.cpp
ScheduleDAGFast.cpp Add a really faster pre-RA scheduler (-pre-RA-sched=linearize). It doesn't use 2012-10-17 19:39:36 +00:00
ScheduleDAGRRList.cpp
ScheduleDAGSDNodes.cpp Add a really faster pre-RA scheduler (-pre-RA-sched=linearize). It doesn't use 2012-10-17 19:39:36 +00:00
ScheduleDAGSDNodes.h Add a really faster pre-RA scheduler (-pre-RA-sched=linearize). It doesn't use 2012-10-17 19:39:36 +00:00
ScheduleDAGVLIW.cpp
SDNodeDbgValue.h
SDNodeOrdering.h
SelectionDAG.cpp Resubmit the changes to llvm core to update the functions to support different pointer sizes on a per address space basis. 2012-10-15 16:24:29 +00:00
SelectionDAGBuilder.cpp
SelectionDAGBuilder.h
SelectionDAGDumper.cpp
SelectionDAGISel.cpp Freeze the reserved registers as soon as isel is complete. 2012-10-15 21:33:06 +00:00
SelectionDAGPrinter.cpp
TargetLowering.cpp
TargetSelectionDAGInfo.cpp