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1391cc19d0
__builtin_bfin_ones does the same as ctpop, so it can be implemented in the front-end. __builtin_bfin_loadbytes loads from an unaligned pointer with the disalignexcpt instruction. It does the same as loading from a pointer with the low bits masked. It is better if the front-end creates a masked load. We can always instruction select the masked to disalignexcpt+load. We keep csync/ssync/idle. These intrinsics represent instructions that need workarounds for some silicon revisions. We may even want to convert inline assembler to intrinsics to enable the workarounds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77917 91177308-0d34-0410-b5e6-96231b3b80d8 |
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| .. | ||
| add-overflow.ll | ||
| add.ll | ||
| addsub-i128.ll | ||
| basic-i1.ll | ||
| basic-i8.ll | ||
| basic-i16.ll | ||
| basic-i32.ll | ||
| basic-i64.ll | ||
| basictest.ll | ||
| burg.ll | ||
| cmp64.ll | ||
| cmp-small-imm.ll | ||
| ct32.ll | ||
| ct64.ll | ||
| ctlz16.ll | ||
| ctlz64.ll | ||
| ctpop16.ll | ||
| cttz16.ll | ||
| cycles.ll | ||
| dg.exp | ||
| double-cast.ll | ||
| frameindex.ll | ||
| i1mem.ll | ||
| i1ops.ll | ||
| i8mem.ll | ||
| i17mem.ll | ||
| i56param.ll | ||
| i216mem.ll | ||
| i248mem.ll | ||
| i256mem.ll | ||
| i256param.ll | ||
| inline-asm.ll | ||
| int-setcc.ll | ||
| invalid-apint.ll | ||
| jumptable.ll | ||
| large-switch.ll | ||
| load-i16.ll | ||
| logic-i16.ll | ||
| many-args.ll | ||
| mulhu.ll | ||
| printf2.ll | ||
| printf.ll | ||
| promote-logic.ll | ||
| promote-setcc.ll | ||
| sdiv.ll | ||
| simple-select.ll | ||
| switch2.ll | ||
| switch.ll | ||
| sync-intr.ll | ||