Tom Stellard 7f288b455e R600: Move code for generating REGISTER_LOAD into R600ISelLowering.cpp ... SI doesn't use REGISTER_LOAD anymore, but it was still hitting this code path for 8-bit and 16-bit private loads. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214566 91177308-0d34-0410-b5e6-96231b3b80d8		2014-08-01 21:50:47 +00:00
..
Analysis	Add @llvm.assume, lowering, and some basic properties	2014-07-25 21:13:35 +00:00
Assembler	verify-uselistorder: Change the default -num-shuffles=5	2014-07-31 18:46:24 +00:00
Bindings
Bitcode	verify-uselistorder: Change the default -num-shuffles=5	2014-07-31 18:46:24 +00:00
BugPoint
CodeGen	R600: Move code for generating REGISTER_LOAD into R600ISelLowering.cpp	2014-08-01 21:50:47 +00:00
DebugInfo	Use "weak alias" instead of "alias weak"	2014-07-30 22:51:54 +00:00
ExecutionEngine	[MCJIT] Fix the ARM BR24 relocation in RuntimeDyldMachO.	2014-07-30 03:35:05 +00:00
Feature	Use "weak alias" instead of "alias weak"	2014-07-30 22:51:54 +00:00
FileCheck	Add missing test for r214210.	2014-07-29 22:57:59 +00:00
Instrumentation	[dfsan] Correctly handle loads and stores of zero size.	2014-08-01 21:18:18 +00:00
Integer
JitListener
Linker	Use "weak alias" instead of "alias weak"	2014-07-30 22:51:54 +00:00
LTO
MC	Allow only disassembling of M-class MSR masks that the assembler knows how to assemble back.	2014-08-01 12:42:11 +00:00
Object	Use "weak alias" instead of "alias weak"	2014-07-30 22:51:54 +00:00
Other
TableGen
tools	llvm-profdata: Replace redundant tests with more targeted ones	2014-08-01 19:59:48 +00:00
Transforms	SLPVectorizer: improved scheduling algorithm.	2014-08-01 09:20:42 +00:00
Unit
Verifier	Use "weak alias" instead of "alias weak"	2014-07-30 22:51:54 +00:00
YAMLParser
.clang-format
CMakeLists.txt	Rename llvm-uselistorder => verify-uselistorder	2014-07-30 17:11:27 +00:00
lit.cfg	Rename llvm-uselistorder => verify-uselistorder	2014-07-30 17:11:27 +00:00
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh