Evan Cheng 15a16def6e Add a hybrid bottom up scheduler that reduce register usage while avoiding ... pipeline stall. It's useful for targets like ARM cortex-a8. NEON has a lot of long latency instructions so a strict register pressure reduction scheduler does not work well. Early experiments show this speeds up some NEON loops by over 30%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104216 91177308-0d34-0410-b5e6-96231b3b80d8		2010-05-20 06:13:19 +00:00
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Mangler.h	give Mangler access to TargetData.	2010-03-12 20:47:28 +00:00
SubtargetFeature.h	The getDefaultSubtargetFeatures method of SubtargetFeature did actually return a	2010-05-11 00:30:02 +00:00
Target.td	MC/Matcher: Add support for over-riding the default MatchInstruction function	2010-05-04 00:33:13 +00:00
TargetAsmBackend.h	MC/Mach-O/x86_64: Add a new hook for checking whether a particular section can	2010-05-12 00:38:17 +00:00
TargetAsmLexer.h	Moved InstallLexer() from the X86-specific AsmLexer	2010-01-31 02:28:18 +00:00
TargetAsmParser.h	Fix various doxygen warnings.	2010-02-22 04:10:52 +00:00
TargetCallingConv.td
TargetData.h	Revert r97064. Duncan pointed out that bitcasts are defined in	2010-02-25 15:20:39 +00:00
TargetELFWriterInfo.h
TargetFrameInfo.h
TargetInstrDesc.h	add a convenient TargetInstrDesc::getNumImplicitUses/Defs method.	2010-03-24 23:07:47 +00:00
TargetInstrInfo.h	Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it	2010-05-06 20:33:48 +00:00
TargetInstrItineraries.h	Initial support for different kinds of FU reservation.	2010-04-07 18:19:32 +00:00
TargetIntrinsicInfo.h	Reintroduce support for overloading target intrinsics	2009-11-05 03:19:08 +00:00
TargetJITInfo.h	* Move stub allocation inside the JITEmitter, instead of exposing a	2009-11-23 23:35:19 +00:00
TargetLowering.h	Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace.	2010-05-19 20:19:50 +00:00
TargetLoweringObjectFile.h	fix a fixme in TargetLoweringObjectFile::getExprForDwarfReference	2010-03-11 21:55:20 +00:00
TargetMachine.h	Add a hybrid bottom up scheduler that reduce register usage while avoiding	2010-05-20 06:13:19 +00:00
TargetOpcodes.h	Add a pseudo instruction REG_SEQUENCE that takes a list of registers and	2010-05-01 00:28:44 +00:00
TargetOptions.h	Remove the -enable-sjlj-eh option, which doesn't do anything.	2010-05-02 15:36:26 +00:00
TargetRegisterInfo.h	Teach two-address pass to do some coalescing while eliminating REG_SEQUENCE	2010-05-14 23:21:14 +00:00
TargetRegistry.h	Momentous day: remove the "O" member from AsmPrinter. Now all	2010-04-04 08:18:47 +00:00
TargetSchedule.td	Make processor FUs unique for given itinerary. This extends the limit of 32	2010-04-18 20:31:01 +00:00
TargetSelect.h	Add the rest of the build system logic for optional target disassemblers	2009-11-25 04:46:58 +00:00
TargetSelectionDAG.td	finally remove the immAllOnesV_bc/immAllZerosV_bc patterns	2010-03-28 08:43:23 +00:00
TargetSelectionDAGInfo.h	Fix a comment.	2010-05-11 18:03:41 +00:00
TargetSubtarget.h	Allow target to specify regclass for which antideps will only be broken along the critical path.	2009-11-13 19:52:48 +00:00