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llvm-6502/test/CodeGen
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Akira Hatanaka a2b2200ff8 [mips] Split the DSP control register and define one register for each field of 
its fields.

This removes false dependencies between DSP instructions which access different
fields of the the control register. Implicit register operands are added to
instructions RDDSP and WRDSP after instruction selection, depending on the
value of the mask operand.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181041 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-03 18:37:49 +00:00
..
AArch64
ARM Optimize away nop CONCAT_VECTOR nodes. 2013-05-01 19:18:51 +00:00
CPP
Generic TBAA: remove !tbaa from testing cases if not used. 2013-04-30 17:52:57 +00:00
Hexagon Hexagon - Add peephole optimizations for zero extends. 2013-05-02 20:22:51 +00:00
Inputs
MBlaze
Mips [mips] Split the DSP control register and define one register for each field of 2013-05-03 18:37:49 +00:00
MSP430
NVPTX
PowerPC LocalStackSlotAllocation improvements 2013-04-30 20:04:37 +00:00
R600 R600: Expand vector or, shl, srl, and xor nodes 2013-05-03 17:21:31 +00:00
SI
SPARC
Thumb LocalStackSlotAllocation improvements 2013-04-30 20:04:37 +00:00
Thumb2 TBAA: remove !tbaa from testing cases if not used. 2013-04-30 17:52:57 +00:00
X86 TBAA: remove !tbaa from testing cases if not used. 2013-05-02 18:11:35 +00:00
XCore