David Majnemer 17585dc4d4 X86: Remove redundant test instructions ... Increase the number of instructions LLVM recognizes as setting the ZF flag. This allows us to remove test instructions that redundantly recalculate the flag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181937 91177308-0d34-0410-b5e6-96231b3b80d8		2013-05-15 22:03:08 +00:00
..
AArch64
ARM	ARM ISel: Don't create illegal types during LowerMUL	2013-05-14 22:33:24 +00:00
CPP
Generic
Hexagon	Hexagon: Pass to replace tranfer/copy instructions into combine instruction	2013-05-14 18:54:06 +00:00
Inputs
MBlaze
Mips	This is the first of three patches which creates stubs used for	2013-05-14 02:00:24 +00:00
MSP430
NVPTX
PowerPC	Implement PPC counter loops as a late IR-level pass	2013-05-15 21:37:41 +00:00
R600	R600/SI: Add lit test coverage for the remaining patterns added recently	2013-05-14 09:53:30 +00:00
SI
SPARC	Recognize sparc64 as an alias for sparcv9 triples.	2013-05-14 17:47:27 +00:00
SystemZ	[SystemZ] Make use of SUBTRACT HALFWORD	2013-05-15 15:05:29 +00:00
Thumb
Thumb2	Fix ARM FastISel tests, as a first step to enabling ARM FastISel	2013-05-14 16:26:38 +00:00
X86	X86: Remove redundant test instructions	2013-05-15 22:03:08 +00:00
XCore	[XCore] Fix handling of functions where only the LR is spilled.	2013-05-09 16:43:42 +00:00