Colin LeMahieu 17946361cc [Hexagon] Adding auto-incrementing loads with and without byte reversal. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224871 91177308-0d34-0410-b5e6-96231b3b80d8		2014-12-26 21:09:25 +00:00
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AArch64	Condition codes AL and NV are invalid in the aliases that use	2014-06-10 13:11:35 +00:00
ARM	Add support for ARM modified-immediate assembly syntax.	2014-12-02 10:53:20 +00:00
Hexagon	[Hexagon] Adding auto-incrementing loads with and without byte reversal.	2014-12-26 21:09:25 +00:00
Mips	[mips][microMIPS] Implement CACHE, PREF, SSNOP, EHB and PAUSE instructions	2014-12-23 19:55:34 +00:00
PowerPC	[PowerPC] Add asm support for cache-inhibited ld/st instructions	2014-11-30 10:15:56 +00:00
Sparc	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00
SystemZ	[SystemZ] Add MC support for LEDBRA, LEXBRA and LDXBRA	2014-07-10 11:00:55 +00:00
X86	[X86] Add the debug registers DR8-DR15 so we can assemble and disassemble references to them.	2014-12-26 18:20:05 +00:00
XCore	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00