llvm-6502/test/CodeGen
Robert Khasanov 5dc8ac87f1 [AVX512] Enabling bit logic lowering
Added lowering tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224132 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 17:02:18 +00:00
..
AArch64 [AArch64] MachO large code-model: Materialize FP constants in code. 2014-12-10 19:43:32 +00:00
ARM Emit Tag_ABI_FP_16bit_format build attribute. 2014-12-12 11:59:18 +00:00
CPP
Generic
Hexagon
Inputs
Mips [mips] Enable code generation for MIPS-III. 2014-12-12 15:16:46 +00:00
MSP430
NVPTX IR: Canonicalize metadata formatting, NFC 2014-12-11 06:32:29 +00:00
PowerPC [PowerPC] Better lowering for add/or of a FrameIndex 2014-12-11 22:51:06 +00:00
R600 R600: Fix min/max matching problems with unordered compares 2014-12-12 02:30:37 +00:00
SPARC
SystemZ
Thumb Re-add support to llvm-objdump for Mach-O universal files and archives with -macho 2014-12-04 23:56:27 +00:00
Thumb2
X86 [AVX512] Enabling bit logic lowering 2014-12-12 17:02:18 +00:00
XCore