Toma Tabacu f28b151b52 [mips] [IAS] Add support for the XOR $reg,imm pseudo-instruction. ... Summary: This adds a MipsInstAlias which expands to XORi $reg,$reg,imm. For example, "xor $6, 0x3A" should be expanded to "xori $6, $6, 58". This should work for all MIPS ISAs. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8284 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232473 91177308-0d34-0410-b5e6-96231b3b80d8		2015-03-17 13:17:44 +00:00
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invalid-mips3-wrong-error.s	[mips][mips64r6] daddi is not available on MIPS64r6	2014-06-13 12:49:06 +00:00
invalid-mips3.s	[mips] Marked the DADDiu instruction aliases as MIPS III.	2014-09-15 14:47:46 +00:00
invalid-mips4-wrong-error.s	[mips] Add support for COP1's Branch-On-Cond-Likely instructions	2014-10-17 14:08:28 +00:00
invalid-mips4.s	[mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6	2014-06-12 15:00:17 +00:00
invalid-mips5-wrong-error.s	[mips] Improve the error messages given by MipsAsmParser.	2014-09-16 15:00:52 +00:00
invalid-mips5.s	[mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6	2014-06-12 15:00:17 +00:00
invalid-mips32.s	[mips] SYNC $stype instruction was added in Mips32	2014-06-18 17:10:30 +00:00
invalid-mips32r2-xfail.s	[mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu=mips(2|32) does not accept them	2014-05-13 11:45:36 +00:00
invalid-mips32r2.s	[mips] Marked the DI/EI instruction aliases as MIPS32r2	2014-10-16 15:23:52 +00:00
valid.s	[mips] [IAS] Add support for the XOR $reg,imm pseudo-instruction.	2015-03-17 13:17:44 +00:00