llvm-6502/test/MC/X86
Kevin Enderby 7772f9af13 Update the X86 assembler for .intel_syntax to produce an error for invalid base
registers in memory addresses that do not match the index register. As it does
for .att_syntax.

rdar://15887380


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199948 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 22:34:42 +00:00
..
AlignedBundling
3DNow.s
2011-09-06-NoNewline.s
address-size.s
avx512-encodings.s
cfi_def_cfa-crash.s
fde-reloc.s
gnux32-dwarf-gen.s
index-operations.s [x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385) 2014-01-22 15:08:55 +00:00
intel-syntax-2.s
intel-syntax-avx512.s Teach X86 asm parser to understand 'ZMMWORD PTR' in Intel syntax. 2014-01-17 07:37:39 +00:00
intel-syntax-bitwise-ops.s Update the X86 assembler for .intel_syntax to accept 2014-01-15 19:05:24 +00:00
intel-syntax-directional-label.s
intel-syntax-encoding.s
intel-syntax-hex.s
intel-syntax-invalid-basereg.s Update the X86 assembler for .intel_syntax to produce an error for invalid base 2014-01-23 22:34:42 +00:00
intel-syntax-invalid-scale.s Update the X86 assembler for .intel_syntax to produce an error for invalid 2014-01-23 21:52:41 +00:00
intel-syntax.s Teach x86 asm parser to handle 'opaque ptr' in Intel syntax. 2014-01-17 07:44:10 +00:00
lit.local.cfg
padlock.s
relax-insn.s [x86] Do not relax PUSHi16 to PUSHi32 (PR18414) 2014-01-08 12:58:32 +00:00
ret.s [x86] Support i386-*-*-code16 triple for emitting 16-bit code 2014-01-20 12:02:25 +00:00
shuffle-comments.s
stackmap-nops.ll
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s
x86_64-bmi-encoding.s
x86_64-encoding.s
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s
x86_64-hle-encoding.s
x86_64-imm-widths.s
x86_64-rand-encoding.s
x86_64-rtm-encoding.s
x86_64-sse4a.s
x86_64-tbm-encoding.s
x86_64-xop-encoding.s
x86_directives.s
x86_errors.s
x86_long_nop.s
x86_nop.s
x86_operands.s
x86-16.s [x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385) 2014-01-22 15:08:55 +00:00
x86-32-avx.s
x86-32-coverage.s
x86-32-fma3.s
x86-32-ms-inline-asm.s
x86-32.s [x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385) 2014-01-22 15:08:55 +00:00
x86-64.s [x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385) 2014-01-22 15:08:55 +00:00
x86-target-directives.s correct target directive handling error handling 2014-01-13 01:15:39 +00:00