Devang Patel a28101e61a Intel Syntax: Parse mem operand with seg reg. QWORD PTR FS:[320] ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149142 91177308-0d34-0410-b5e6-96231b3b80d8		2012-01-27 19:48:28 +00:00
..
3DNow.s
2011-09-06-NoNewline.s
dg.exp
intel-syntax-encoding.s	Intel Syntax: Extend special hand coded logic, to recognize special instructions, for intel syntax.	2012-01-24 21:43:36 +00:00
intel-syntax.s	Intel Syntax: Parse mem operand with seg reg. QWORD PTR FS:[320]	2012-01-27 19:48:28 +00:00
padlock.s
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s	Make sure we correctly note the existence of an i8 immediate for vblendvps and friends, so we compute fixups correctly. PR11586.	2011-12-15 23:46:18 +00:00
x86_64-bmi-encoding.s
x86_64-encoding.s
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s	Support for encoding all FMA4 instructions and tablegen patterns for all	2011-11-30 22:09:42 +00:00
x86_64-imm-widths.s
x86_64-xop-encoding.s	XOP instructions and encoding tests.	2011-12-12 19:37:49 +00:00
x86_directives.s
x86_errors.s
x86_operands.s
x86-32-avx.s
x86-32-coverage.s
x86-32-fma3.s
x86-32.s
x86-64.s