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llvm-6502/test/MC
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Vasileios Kalintiris 1a71ee21d3 [mips] Added support for the ERETNC instruction. 
Summary: This required adding the instruction predicate HasMips32r5.

Patch by Scott Egerton.

Reviewers: dsanders, vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11136

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242666 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-20 12:28:56 +00:00
..
AArch64
AArch64: add rev64 alias for 64-bit rev instruction.
2015-07-14 17:07:29 +00:00
AMDGPU
…
ARM
[ARM] Handle commutativity when converting to tADDhirr in Thumb2
2015-07-13 15:31:48 +00:00
AsmParser
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COFF
[MC] Correctly escape .safeseh's symbol
2015-07-13 18:51:15 +00:00
Disassembler
[mips] Added support for the ERETNC instruction.
2015-07-20 12:28:56 +00:00
ELF
[X86] Fix incorrect/inefficient pushw encodings for x86-64 targets
2015-07-05 10:25:41 +00:00
Hexagon
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MachO
Reworking the test part of r241149
2015-07-02 16:53:23 +00:00
Markup
…
Mips
[mips] Added support for the ERETNC instruction.
2015-07-20 12:28:56 +00:00
PowerPC
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Sparc
[Sparc] Add more instruction aliases.
2015-07-06 16:01:07 +00:00
SystemZ
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X86
[X86] Add support for tbyte memory operand size for Intel-syntax x86 assembly
2015-07-19 11:03:08 +00:00