llvm-6502/test/MC/Disassembler
Quentin Colombet 1ad3a410be ARM: Fix encoding of hint instruction for Thumb.
"hint" space for Thumb actually overlaps the encoding space of the CPS
instruction. In actuality, hints can be defined as CPS instructions where imod
and M bits are all nil.

Handle decoding of permitted nop-compatible hints (i.e. nop, yield, wfi, wfe,
sev) in DecodeT2CPSInstruction.

This commit adds a proper diagnostic message for Imm0_4 and updates all tests.

Patch by Mihail Popa <Mihail.Popa@arm.com>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180617 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26 17:54:54 +00:00
..
AArch64 AArch64: implement ETMv4 trace system registers. 2013-04-03 12:31:29 +00:00
ARM ARM: Fix encoding of hint instruction for Thumb. 2013-04-26 17:54:54 +00:00
MBlaze Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
Mips [mips] DSP-ASE move from HI/LO register instructions. 2013-04-18 00:52:44 +00:00
X86 Add CLAC/STAC instruction encoding/decoding support 2013-04-11 04:52:28 +00:00
XCore Use object file specific section type for initial text section 2013-04-14 21:18:36 +00:00