llvm-6502/lib/Target/AArch64
Hao Liu 6a5a667517 Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
Including following 14 instructions:
4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192361 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-10 17:00:52 +00:00
..
AsmParser Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
Disassembler Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
InstPrinter Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
MCTargetDesc Add a MCTargetStreamer interface. 2013-10-08 13:08:17 +00:00
TargetInfo
Utils Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
AArch64.h
AArch64.td
AArch64AsmPrinter.cpp AArch64: use RegisterOperand for NEON registers. 2013-09-13 07:26:52 +00:00
AArch64AsmPrinter.h DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs 2013-06-16 20:34:27 +00:00
AArch64BranchFixupPass.cpp
AArch64CallingConv.td Initial support for Neon scalar instructions. 2013-09-24 02:47:27 +00:00
AArch64FrameLowering.cpp Add const qualifier to some static arrays. 2013-07-15 07:02:45 +00:00
AArch64FrameLowering.h Add const qualifier to some static arrays. 2013-07-15 07:02:45 +00:00
AArch64InstrFormats.td Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
AArch64InstrInfo.cpp Implement 3 AArch64 neon instructions : umov smov ins. 2013-09-17 02:21:02 +00:00
AArch64InstrInfo.h DebugInfo: remove target-specific Frame Index handling for DBG_VALUE MachineInstrs 2013-06-16 20:34:27 +00:00
AArch64InstrInfo.td Initial support for Neon scalar instructions. 2013-09-24 02:47:27 +00:00
AArch64InstrNEON.td Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
AArch64ISelDAGToDAG.cpp Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
AArch64ISelLowering.cpp Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
AArch64ISelLowering.h Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
AArch64MachineFunctionInfo.cpp
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp AArch64: add initial NEON support 2013-08-01 09:20:35 +00:00
AArch64RegisterInfo.cpp Don't cache the instruction info and register info objects. 2013-06-07 05:00:11 +00:00
AArch64RegisterInfo.h Don't cache the instruction info and register info objects. 2013-06-07 05:00:11 +00:00
AArch64RegisterInfo.td Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 2013-10-10 17:00:52 +00:00
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64Subtarget.cpp AArch64: add initial NEON support 2013-08-01 09:20:35 +00:00
AArch64Subtarget.h AArch64: enable MISched by default. 2013-10-09 07:53:57 +00:00
AArch64TargetMachine.cpp
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
CMakeLists.txt Target/*/CMakeLists.txt: Add the dependency to CommonTableGen explicitly for each corresponding CodeGen. 2013-08-06 06:38:37 +00:00
LLVMBuild.txt
Makefile
README.txt

This file will contain changes that need to be made before AArch64 can become an
officially supported target. Currently a placeholder.