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1d9ab25560
llvm-6502
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utils
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TableGen
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Craig Topper
85026d9375
Allow x86 mov instructions to/from memory with absolute address to be encoded and disassembled with a segment override prefix. Fixes PR16962.
...
git-svn-id:
https://llvm.org/svn/llvm-project/llvm/trunk@199364
91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-16 07:36:58 +00:00
..
AsmMatcherEmitter.cpp
AsmWriterEmitter.cpp
Constant propagate MachineInstrClassName.
2014-01-10 22:59:49 +00:00
AsmWriterInst.cpp
Remove dead code.
2013-12-02 05:10:04 +00:00
AsmWriterInst.h
Remove dead code.
2013-12-02 05:10:04 +00:00
CallingConvEmitter.cpp
Add FPExt option to CCValAssign::LocInfo. When generating calling-convention
2014-01-14 19:56:36 +00:00
CMakeLists.txt
CodeEmitterGen.cpp
Support little-endian encodings in the FixedLenDecoderEmitter
2013-12-17 22:37:50 +00:00
CodeGenDAGPatterns.cpp
[TableGen] Handle ValueType in CodeGenDAGPatterns GetNumNodeResults
2014-01-02 20:47:05 +00:00
CodeGenDAGPatterns.h
TableGen: Refactor DAG patterns to enable parsing one pattern at a time.
2013-10-28 18:07:21 +00:00
CodeGenInstruction.cpp
CodeGenInstruction.h
CodeGenIntrinsics.h
CodeGenMapTable.cpp
Correct word hyphenations
2013-12-05 05:44:44 +00:00
CodeGenRegisters.cpp
CodeGenRegisters.h
CodeGenSchedule.cpp
[weak vtables] Place class definitions into anonymous namespaces to prevent weak vtables.
2013-11-19 03:08:35 +00:00
CodeGenSchedule.h
CodeGenTarget.cpp
Support little-endian encodings in the FixedLenDecoderEmitter
2013-12-17 22:37:50 +00:00
CodeGenTarget.h
Support little-endian encodings in the FixedLenDecoderEmitter
2013-12-17 22:37:50 +00:00
CTagsEmitter.cpp
DAGISelEmitter.cpp
DAGISelMatcher.cpp
DAGISelMatcher.h
DAGISelMatcherEmitter.cpp
DAGISelMatcherGen.cpp
DAGISelMatcherOpt.cpp
DFAPacketizerEmitter.cpp
DisassemblerEmitter.cpp
Don't use PrintFatalError(which calls exit) for 'Primary decode conflict'. Just skip emitting the table. This way the main function will delete the output file instead of it remaining empty and confusing dependency checks if build is invoked a second time.
2014-01-05 01:34:12 +00:00
FastISelEmitter.cpp
FixedLenDecoderEmitter.cpp
Add support for positionally-encoded operands to FixedLenDecoderEmitter
2013-12-19 16:12:53 +00:00
InstrInfoEmitter.cpp
[weak vtables] Remove a bunch of weak vtables
2013-11-19 00:57:56 +00:00
IntrinsicEmitter.cpp
Small improvement to InstrinsicEmitter::EmitAttributes. This change removes the “pushing” and “clearing” of the SmallVector and instead uses const arrays to pass the attributeKinds to AttributeSet::get .
2013-11-16 00:20:01 +00:00
LLVMBuild.txt
Makefile
OptParserEmitter.cpp
PseudoLoweringEmitter.cpp
RegisterInfoEmitter.cpp
SequenceToOffsetTable.h
SetTheory.cpp
[weak vtables] Remove a bunch of weak vtables
2013-11-19 00:57:56 +00:00
SetTheory.h
SubtargetEmitter.cpp
TableGen.cpp
replace LeakSanitizerIsTurnedOffForTheCurrentProcess with __lsan_is_turned_off, but this time hide it under __has_feature(address_sanitizer); also include <sanitizer/lsan_interface.h>
2014-01-15 07:59:37 +00:00
TableGenBackends.h
tdtags
TGValueTypes.cpp
[weak vtables] Place class definitions into anonymous namespaces to prevent weak vtables.
2013-11-19 03:08:35 +00:00
X86DisassemblerShared.h
Remove modifierType/Base from X86 disassembler tables as they are no longer used. Removes ~11.5K from static tables.
2014-01-01 21:52:57 +00:00
X86DisassemblerTables.cpp
AVX-512: Embedded Rounding Control - encoding and printing
2014-01-13 12:55:03 +00:00
X86DisassemblerTables.h
X86ModRMFilters.cpp
Second attempt at Removing special form of AddRegFrm used by FP instructions. These instructions can be handled by MRMXr instead.
2014-01-01 14:22:37 +00:00
X86ModRMFilters.h
Second attempt at Removing special form of AddRegFrm used by FP instructions. These instructions can be handled by MRMXr instead.
2014-01-01 14:22:37 +00:00
X86RecognizableInstr.cpp
Allow x86 mov instructions to/from memory with absolute address to be encoded and disassembled with a segment override prefix. Fixes PR16962.
2014-01-16 07:36:58 +00:00
X86RecognizableInstr.h
Simplify x86 disassembler table handling of when to use TYPE_Rv/TYPE_R16/TYPE_R32 now that HasOpSizePrefix only means 16-bit instructions.
2014-01-15 05:02:02 +00:00