llvm-6502/test/CodeGen
Peter Collingbourne 92d63ccfc7 When legalising shifts, do not pre-build a list of operands which
may be RAUW'd by the recursive call to LegalizeOps; instead, retrieve
the other operands when calling UpdateNodeOperands.  Fixes PR12889.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157162 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-20 18:36:15 +00:00
..
ARM Transfer memory operands to the right instruction. 2012-05-20 06:38:42 +00:00
CellSPU
CPP
Generic change the objectsize intrinsic signature: add a 3rd parameter to denote the maximum runtime performance penalty that the user is willing to accept. 2012-05-09 15:52:43 +00:00
Hexagon Enable all Hexagon tests. 2012-05-15 16:13:12 +00:00
MBlaze
Mips Add support for the 'd' mips inline asm output modifier. 2012-05-19 00:51:56 +00:00
MSP430
NVPTX This patch adds a new NVPTX back-end to LLVM which supports code generation for NVIDIA PTX 3.0. This back-end will (eventually) replace the current PTX back-end, while maintaining compatibility with it. 2012-05-04 20:18:50 +00:00
PowerPC Add a missing PPC 64-bit stwu pattern. 2012-05-20 17:11:24 +00:00
PTX
SPARC Regression test for PR2960. 2012-05-01 11:11:34 +00:00
Thumb
Thumb2 Use the right register class for LDRrs. 2012-05-20 06:38:47 +00:00
X86 When legalising shifts, do not pre-build a list of operands which 2012-05-20 18:36:15 +00:00
XCore