Andrew Trick 1e94e98b0e misched: ILP scheduler for experimental heuristics. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165950 91177308-0d34-0410-b5e6-96231b3b80d8		2012-10-15 18:02:27 +00:00
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ARM	Fixed PR13938: the ARM backend was crashing because it couldn't select a VDUPLANE node with the vector input size different from the output size. This was bacause the BUILD_VECTOR lowering code didn't check that the size of the input vector was correct for using VDUPLANE.	2012-10-15 09:41:32 +00:00
CellSPU	Fix broken tests.	2012-10-02 15:49:34 +00:00
CPP
Generic
Hexagon
MBlaze
Mips	Div, Rem int/unsigned int	2012-10-12 02:01:09 +00:00
MSP430
NVPTX
PowerPC	llvm/test/CodeGen/PowerPC/2012-10-12-bitcast.ll: Try to fix failure on non-ppc hosts, to add -mattr=+altivec.	2012-10-12 16:01:08 +00:00
SPARC	Fix broken tests.	2012-10-02 15:49:34 +00:00
Thumb
Thumb2	Add LLVM support for Swift.	2012-09-29 21:43:49 +00:00
X86	misched: ILP scheduler for experimental heuristics.	2012-10-15 18:02:27 +00:00
XCore