Stuart Hastings 1f2cb9824d An imminent fix to the x86_64 byval logic will expose a flaw in the ... x86_64 sibcall logic. I've filed PR9943 for the sibcall problem, and this patch alters the testcase to work around the flaw. When PR9943 is fixed, this patch should be reverted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131557 91177308-0d34-0410-b5e6-96231b3b80d8		2011-05-18 19:19:17 +00:00
..
Alpha	If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0.	2010-12-06 22:39:26 +00:00
ARM	In r131488 I misunderstood how VREV works. It splits the vector in half and splits each half. Therefore, the real problem was that we were using a VREV64 for a 4xi16, when we should have been using a VREV32.	2011-05-18 06:42:21 +00:00
Blackfin	Don't completely eliminate identity copies that also modify super register liveness.	2011-03-31 17:55:25 +00:00
CBackend
CellSPU	don't test for codegen of 'store undef'	2011-04-09 02:31:26 +00:00
CPP
Generic	Move test for appropriate directory.	2011-05-17 19:06:43 +00:00
MBlaze	Add scheduling information for the MBlaze backend.	2011-04-11 22:31:52 +00:00
Mips	Remove LLVM IR metadata in test case committed in r130847.	2011-05-04 18:28:36 +00:00
MSP430	Fix register-dependent test in MSP430.	2011-05-04 01:01:39 +00:00
PowerPC	FileCheckize and break dependence on coalescing order.	2011-05-04 19:02:01 +00:00
PTX	PTX: add flag to disable mad/fma selection	2011-05-18 15:42:23 +00:00
SPARC	Fix more register and coalescing dependencies.	2011-05-04 19:02:11 +00:00
SystemZ	Fix SystemZ tests	2011-03-31 23:02:12 +00:00
Thumb	Move this test to CodeGen/Thumb. rdar://problem/9416774	2011-05-11 19:41:28 +00:00
Thumb2	Since I can't reproduce the failures from 131261, re-trying with a	2011-05-13 00:51:54 +00:00
X86	An imminent fix to the x86_64 byval logic will expose a flaw in the	2011-05-18 19:19:17 +00:00
XCore	Fix register-dependent XCore tests	2011-05-04 01:01:41 +00:00