Bruno Cardoso Lopes 2045c47aff - Add sugregister logic to handle f64=(f32,f32). ... - Support mips1 like load/store of doubles: Instead of: sdc $f0, X($3) Generate: swc $f0, X($3) swc $f1, X+4($3) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89322 91177308-0d34-0410-b5e6-96231b3b80d8		2009-11-19 06:06:13 +00:00
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Alpha	Eliminate more uses of llvm-as and llvm-dis.	2009-09-09 00:09:15 +00:00
ARM	Fix buildbots.	2009-11-18 23:30:38 +00:00
Blackfin	Move Blackfin intrinsics into the Target/Blackfin directory.	2009-10-15 18:50:52 +00:00
CBackend	Eliminate more uses of llvm-as and llvm-dis.	2009-09-09 00:09:15 +00:00
CellSPU	Revert the main portion of r31856. It was causing BranchFolding	2009-10-22 00:03:58 +00:00
CPP	fix PR5295 where the .ll parser didn't reject a function after a global	2009-10-25 23:22:50 +00:00
Generic	Added a testcase for PR5495.	2009-11-16 20:03:13 +00:00
Mips	- Add sugregister logic to handle f64=(f32,f32).	2009-11-19 06:06:13 +00:00
MSP430	Add and-not (bic) patterns. Based heavily on patch by Brian Lucas!	2009-11-08 15:33:12 +00:00
PIC16	Re-apply 84180 with the fixed test case.	2009-10-15 19:26:25 +00:00
PowerPC	Check if subreg index is zero.	2009-11-16 06:31:49 +00:00
SPARC	Eliminate some redundant llvm-as calls.	2009-10-12 09:31:55 +00:00
SystemZ	Eliminate more uses of llvm-as and llvm-dis.	2009-09-09 00:09:15 +00:00
Thumb	Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRpci_pic.	2009-11-07 04:04:34 +00:00
Thumb2	Enable arm jumpt table adjustment.	2009-11-17 21:24:11 +00:00
X86	Test from Dhrystone to make sure that we're not emitting an aligned load for a	2009-11-19 01:33:57 +00:00
XCore	Add XCore support for indirectbr / blockaddress.	2009-11-18 23:20:42 +00:00