Juergen Ributzka 22b557d942 [FastISel][AArch64] Try to fold the offset into the add instruction when simplifying a memory address. ...

Small optimization in 'simplifyAddress'. When the offset cannot be encoded in
the load/store instruction, then we need to materialize the address manually.
The add instruction can encode a wider range of immediates than the load/store
instructions. This change tries to fold the offset into the add instruction
first before materializing the offset in a register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218031 91177308-0d34-0410-b5e6-96231b3b80d8

2014-09-18 05:40:47 +00:00

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AArch64

[FastISel][AArch64] Try to fold the offset into the add instruction when simplifying a memory address.

2014-09-18 05:40:47 +00:00

ARM

Revert "[ARM, Fix] Fix emitLeading/TrailingFence on old ARM processors"

2014-09-17 18:09:13 +00:00

CPP

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Generic

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Hexagon

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Inputs

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Mips

Add mips32 r1 to the list of supported targets for Mips fast-isel

2014-09-15 20:30:25 +00:00

MSP430

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NVPTX

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PowerPC

Fix FastISel bug in boolean returns for PowerPC.

2014-09-17 23:25:06 +00:00

R600

Exclude known and bugzilled failures from UBSan bootstrap

2014-09-17 20:17:52 +00:00

SPARC

Add back tests for empty function in SPARC and PowerPC.

2014-09-15 22:11:07 +00:00

SystemZ

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Thumb

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Thumb2

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X86

[x86] Add an SSSE3 run to the v4 shuffle test.

2014-09-18 04:38:32 +00:00

XCore

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