llvm-6502/test/CodeGen
Bob Wilson 75f0288b7d Add target-specific DAG combiner for BUILD_VECTOR and VMOVRRD. An i64
value should be in GPRs when it's going to be used as a scalar, and we use
VMOVRRD to make that happen, but if the value is converted back to a vector
we need to fold to a simple bit_convert.  Radar 8407927.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114233 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-17 22:59:05 +00:00
..
Alpha
ARM Add target-specific DAG combiner for BUILD_VECTOR and VMOVRRD. An i64 2010-09-17 22:59:05 +00:00
Blackfin
CBackend
CellSPU Change SPU register re-interpretations from OR to COPY_TO_REGCLASS instruction. 2010-09-16 12:29:33 +00:00
CPP
Generic
MBlaze
Mips Correct bogus module triple specifications. 2010-08-30 10:48:29 +00:00
MSP430
PIC16
PowerPC PR7781: Fix incorrect shifting in PPCTargetLowering::LowerBUILD_VECTOR. 2010-08-02 00:18:19 +00:00
SPARC
SystemZ Correct bogus module triple specifications. 2010-08-30 10:48:29 +00:00
Thumb Re-enable usage of the ARM base pointer. r113394 fixed the known failures. 2010-09-08 20:12:02 +00:00
Thumb2 Teach the (non-MC) instruction printer to use the cannonical names for push/pop, 2010-09-17 22:36:38 +00:00
X86 Teach machine sink to 2010-09-17 22:28:18 +00:00
XCore