llvm-6502/test/CodeGen
Duncan P. N. Exon Smith cc1e1707b8 blockfreq: Rewrite BlockFrequencyInfoImpl
Rewrite the shared implementation of BlockFrequencyInfo and
MachineBlockFrequencyInfo entirely.

The old implementation had a fundamental flaw:  precision losses from
nested loops (or very wide branches) compounded past loop exits (and
convergence points).

The @nested_loops testcase at the end of
test/Analysis/BlockFrequencyAnalysis/basic.ll is motivating.  This
function has three nested loops, with branch weights in the loop headers
of 1:4000 (exit:continue).  The old analysis gives non-sensical results:

    Printing analysis 'Block Frequency Analysis' for function 'nested_loops':
    ---- Block Freqs ----
     entry = 1.0
     for.cond1.preheader = 1.00103
     for.cond4.preheader = 5.5222
     for.body6 = 18095.19995
     for.inc8 = 4.52264
     for.inc11 = 0.00109
     for.end13 = 0.0

The new analysis gives correct results:

    Printing analysis 'Block Frequency Analysis' for function 'nested_loops':
    block-frequency-info: nested_loops
     - entry: float = 1.0, int = 8
     - for.cond1.preheader: float = 4001.0, int = 32007
     - for.cond4.preheader: float = 16008001.0, int = 128064007
     - for.body6: float = 64048012001.0, int = 512384096007
     - for.inc8: float = 16008001.0, int = 128064007
     - for.inc11: float = 4001.0, int = 32007
     - for.end13: float = 1.0, int = 8

Most importantly, the frequency leaving each loop matches the frequency
entering it.

The new algorithm leverages BlockMass and PositiveFloat to maintain
precision, separates "probability mass distribution" from "loop
scaling", and uses dithering to eliminate probability mass loss.  I have
unit tests for these types out of tree, but it was decided in the review
to make the classes private to BlockFrequencyInfoImpl, and try to shrink
them (or remove them entirely) in follow-up commits.

The new algorithm should generally have a complexity advantage over the
old.  The previous algorithm was quadratic in the worst case.  The new
algorithm is still worst-case quadratic in the presence of irreducible
control flow, but it's linear without it.

The key difference between the old algorithm and the new is that control
flow within a loop is evaluated separately from control flow outside,
limiting propagation of precision problems and allowing loop scale to be
calculated independently of mass distribution.  Loops are visited
bottom-up, their loop scales are calculated, and they are replaced by
pseudo-nodes.  Mass is then distributed through the function, which is
now a DAG.  Finally, loops are revisited top-down to multiply through
the loop scales and the masses distributed to pseudo nodes.

There are some remaining flaws.

  - Irreducible control flow isn't modelled correctly.  LoopInfo and
    MachineLoopInfo ignore irreducible edges, so this algorithm will
    fail to scale accordingly.  There's a note in the class
    documentation about how to get closer.  See also the comments in
    test/Analysis/BlockFrequencyInfo/irreducible.ll.

  - Loop scale is limited to 4096 per loop (2^12) to avoid exhausting
    the 64-bit integer precision used downstream.

  - The "bias" calculation proposed on llvmdev is *not* incorporated
    here.  This will be added in a follow-up commit, once comments from
    this review have been handled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206548 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-18 01:57:45 +00:00
..
AArch64 AArch64/ARM64: port some NEON tests to ARM64 2014-04-16 15:28:02 +00:00
ARM Make FastISel::SelectInstruction return before target specific fast-isel code 2014-04-15 21:30:06 +00:00
ARM64 Make test/CodeGen/ARM64/vector-insertion.ll explicitly select neon syntax 2014-04-17 21:32:41 +00:00
CPP
Generic CommandLine: Exit successfully for -version and -help 2014-02-28 19:08:01 +00:00
Hexagon Fix broken CHECK lines 2014-02-16 07:31:05 +00:00
Inputs
Mips [mips] Add initial support for NaN2008 in the back-end. 2014-04-16 15:48:55 +00:00
MSP430 Mark FPB as a reserved register when needed. 2014-04-02 13:13:56 +00:00
NVPTX [NVPTX] Add preliminary intrinsics and codegen support for textures/surfaces 2014-04-09 15:39:15 +00:00
PowerPC [PowerPC] Fix rlwimi isel when mask is not constant 2014-04-13 17:10:58 +00:00
R600 R600/SI: Match sign_extend_inreg to s_sext_i32_i8 and s_sext_i32_i16 2014-04-18 01:53:18 +00:00
SPARC Remove the linker_private and linker_private_weak linkages. 2014-03-13 23:18:37 +00:00
SystemZ Reenable use of TBAA during CodeGen 2014-04-12 01:26:00 +00:00
Thumb Make this test not match its own filename, when being run from a path that includes the string 'add'. 2014-04-15 22:29:32 +00:00
Thumb2 Move the segmented stack switch to a function attribute 2014-04-10 22:58:43 +00:00
X86 [stack protector] Make the StackProtector pass respect ssp-buffer-size. 2014-04-17 19:08:36 +00:00
XCore blockfreq: Rewrite BlockFrequencyInfoImpl 2014-04-18 01:57:45 +00:00