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LegalizeTypes. Correct the load logic so that it actually works, and also teach it to handle floating point extending loads. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49923 91177308-0d34-0410-b5e6-96231b3b80d8
357 lines
14 KiB
C++
357 lines
14 KiB
C++
//===-- LegalizeTypesFloatToInt.cpp - LegalizeTypes float to int support --===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements float to integer conversion for LegalizeTypes. This
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// is the act of turning a computation in an invalid floating point type into
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// a computation in an integer type of the same size. For example, turning
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// f32 arithmetic into operations using i32. Also known as "soft float".
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// The result is equivalent to bitcasting the float value to the integer type.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/PseudoSourceValue.h"
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#include "llvm/DerivedTypes.h"
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#include "LegalizeTypes.h"
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using namespace llvm;
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/// GetFPLibCall - Return the right libcall for the given floating point type.
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static RTLIB::Libcall GetFPLibCall(MVT::ValueType VT,
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RTLIB::Libcall Call_F32,
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RTLIB::Libcall Call_F64,
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RTLIB::Libcall Call_F80,
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RTLIB::Libcall Call_PPCF128) {
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return
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VT == MVT::f32 ? Call_F32 :
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VT == MVT::f64 ? Call_F64 :
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VT == MVT::f80 ? Call_F80 :
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VT == MVT::ppcf128 ? Call_PPCF128 :
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RTLIB::UNKNOWN_LIBCALL;
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}
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//===----------------------------------------------------------------------===//
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// Result Float to Integer Conversion.
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//===----------------------------------------------------------------------===//
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void DAGTypeLegalizer::FloatToIntResult(SDNode *N, unsigned ResNo) {
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DEBUG(cerr << "FloatToInt node result " << ResNo << ": "; N->dump(&DAG);
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cerr << "\n");
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SDOperand R = SDOperand();
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// FIXME: Custom lowering for float-to-int?
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#if 0
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// See if the target wants to custom convert this node to an integer.
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if (TLI.getOperationAction(N->getOpcode(), N->getValueType(0)) ==
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TargetLowering::Custom) {
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// If the target wants to, allow it to lower this itself.
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if (SDNode *P = TLI.FloatToIntOperationResult(N, DAG)) {
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// Everything that once used N now uses P. We are guaranteed that the
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// result value types of N and the result value types of P match.
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ReplaceNodeWith(N, P);
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return;
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}
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}
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#endif
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switch (N->getOpcode()) {
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default:
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#ifndef NDEBUG
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cerr << "FloatToIntResult #" << ResNo << ": ";
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N->dump(&DAG); cerr << "\n";
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#endif
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assert(0 && "Do not know how to convert the result of this operator!");
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abort();
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case ISD::BIT_CONVERT: R = FloatToIntRes_BIT_CONVERT(N); break;
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case ISD::BUILD_PAIR: R = FloatToIntRes_BUILD_PAIR(N); break;
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case ISD::ConstantFP:
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R = FloatToIntRes_ConstantFP(cast<ConstantFPSDNode>(N));
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break;
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case ISD::FCOPYSIGN: R = FloatToIntRes_FCOPYSIGN(N); break;
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case ISD::LOAD: R = FloatToIntRes_LOAD(N); break;
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case ISD::SINT_TO_FP:
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case ISD::UINT_TO_FP: R = FloatToIntRes_XINT_TO_FP(N); break;
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case ISD::FADD: R = FloatToIntRes_FADD(N); break;
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case ISD::FMUL: R = FloatToIntRes_FMUL(N); break;
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case ISD::FSUB: R = FloatToIntRes_FSUB(N); break;
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}
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// If R is null, the sub-method took care of registering the result.
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if (R.Val)
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SetIntegerOp(SDOperand(N, ResNo), R);
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}
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SDOperand DAGTypeLegalizer::FloatToIntRes_BIT_CONVERT(SDNode *N) {
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return BitConvertToInteger(N->getOperand(0));
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}
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SDOperand DAGTypeLegalizer::FloatToIntRes_BUILD_PAIR(SDNode *N) {
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// Convert the inputs to integers, and build a new pair out of them.
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return DAG.getNode(ISD::BUILD_PAIR,
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TLI.getTypeToTransformTo(N->getValueType(0)),
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BitConvertToInteger(N->getOperand(0)),
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BitConvertToInteger(N->getOperand(1)));
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}
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SDOperand DAGTypeLegalizer::FloatToIntRes_ConstantFP(ConstantFPSDNode *N) {
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return DAG.getConstant(N->getValueAPF().convertToAPInt(),
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TLI.getTypeToTransformTo(N->getValueType(0)));
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}
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SDOperand DAGTypeLegalizer::FloatToIntRes_FADD(SDNode *N) {
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MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDOperand Ops[2] = { GetIntegerOp(N->getOperand(0)),
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GetIntegerOp(N->getOperand(1)) };
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return MakeLibCall(GetFPLibCall(N->getValueType(0),
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RTLIB::ADD_F32,
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RTLIB::ADD_F64,
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RTLIB::ADD_F80,
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RTLIB::ADD_PPCF128),
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NVT, Ops, 2, false/*sign irrelevant*/);
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}
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SDOperand DAGTypeLegalizer::FloatToIntRes_FCOPYSIGN(SDNode *N) {
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SDOperand LHS = GetIntegerOp(N->getOperand(0));
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SDOperand RHS = BitConvertToInteger(N->getOperand(1));
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MVT::ValueType LVT = LHS.getValueType();
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MVT::ValueType RVT = RHS.getValueType();
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unsigned LSize = MVT::getSizeInBits(LVT);
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unsigned RSize = MVT::getSizeInBits(RVT);
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// First get the sign bit of second operand.
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SDOperand SignBit = DAG.getNode(ISD::SHL, RVT, DAG.getConstant(1, RVT),
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DAG.getConstant(RSize - 1,
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TLI.getShiftAmountTy()));
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SignBit = DAG.getNode(ISD::AND, RVT, RHS, SignBit);
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// Shift right or sign-extend it if the two operands have different types.
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int SizeDiff = MVT::getSizeInBits(RVT) - MVT::getSizeInBits(LVT);
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if (SizeDiff > 0) {
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SignBit = DAG.getNode(ISD::SRL, RVT, SignBit,
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DAG.getConstant(SizeDiff, TLI.getShiftAmountTy()));
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SignBit = DAG.getNode(ISD::TRUNCATE, LVT, SignBit);
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} else if (SizeDiff < 0) {
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SignBit = DAG.getNode(ISD::ANY_EXTEND, LVT, SignBit);
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SignBit = DAG.getNode(ISD::SHL, LVT, SignBit,
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DAG.getConstant(-SizeDiff, TLI.getShiftAmountTy()));
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}
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// Clear the sign bit of the first operand.
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SDOperand Mask = DAG.getNode(ISD::SHL, LVT, DAG.getConstant(1, LVT),
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DAG.getConstant(LSize - 1,
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TLI.getShiftAmountTy()));
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Mask = DAG.getNode(ISD::SUB, LVT, Mask, DAG.getConstant(1, LVT));
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LHS = DAG.getNode(ISD::AND, LVT, LHS, Mask);
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// Or the value with the sign bit.
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return DAG.getNode(ISD::OR, LVT, LHS, SignBit);
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}
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SDOperand DAGTypeLegalizer::FloatToIntRes_FMUL(SDNode *N) {
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MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDOperand Ops[2] = { GetIntegerOp(N->getOperand(0)),
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GetIntegerOp(N->getOperand(1)) };
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return MakeLibCall(GetFPLibCall(N->getValueType(0),
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RTLIB::MUL_F32,
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RTLIB::MUL_F64,
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RTLIB::MUL_F80,
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RTLIB::MUL_PPCF128),
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NVT, Ops, 2, false/*sign irrelevant*/);
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}
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SDOperand DAGTypeLegalizer::FloatToIntRes_FSUB(SDNode *N) {
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MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
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SDOperand Ops[2] = { GetIntegerOp(N->getOperand(0)),
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GetIntegerOp(N->getOperand(1)) };
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return MakeLibCall(GetFPLibCall(N->getValueType(0),
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RTLIB::SUB_F32,
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RTLIB::SUB_F64,
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RTLIB::SUB_F80,
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RTLIB::SUB_PPCF128),
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NVT, Ops, 2, false/*sign irrelevant*/);
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}
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SDOperand DAGTypeLegalizer::FloatToIntRes_LOAD(SDNode *N) {
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LoadSDNode *L = cast<LoadSDNode>(N);
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MVT::ValueType VT = N->getValueType(0);
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MVT::ValueType NVT = TLI.getTypeToTransformTo(VT);
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if (L->getExtensionType() == ISD::NON_EXTLOAD)
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return DAG.getLoad(L->getAddressingMode(), L->getExtensionType(),
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NVT, L->getChain(), L->getBasePtr(), L->getOffset(),
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L->getSrcValue(), L->getSrcValueOffset(), NVT,
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L->isVolatile(), L->getAlignment());
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// Do a non-extending load followed by FP_EXTEND.
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SDOperand NL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD,
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L->getMemoryVT(), L->getChain(),
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L->getBasePtr(), L->getOffset(),
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L->getSrcValue(), L->getSrcValueOffset(),
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L->getMemoryVT(),
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L->isVolatile(), L->getAlignment());
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return BitConvertToInteger(DAG.getNode(ISD::FP_EXTEND, VT, NL));
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}
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SDOperand DAGTypeLegalizer::FloatToIntRes_XINT_TO_FP(SDNode *N) {
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bool isSigned = N->getOpcode() == ISD::SINT_TO_FP;
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MVT::ValueType DestVT = N->getValueType(0);
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SDOperand Op = N->getOperand(0);
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if (Op.getValueType() == MVT::i32) {
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// simple 32-bit [signed|unsigned] integer to float/double expansion
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// Get the stack frame index of a 8 byte buffer.
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SDOperand StackSlot = DAG.CreateStackTemporary(MVT::f64);
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// word offset constant for Hi/Lo address computation
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SDOperand Offset = DAG.getConstant(MVT::getSizeInBits(MVT::i32) / 8,
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TLI.getPointerTy());
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// set up Hi and Lo (into buffer) address based on endian
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SDOperand Hi = StackSlot;
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SDOperand Lo = DAG.getNode(ISD::ADD, TLI.getPointerTy(), StackSlot, Offset);
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if (TLI.isLittleEndian())
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std::swap(Hi, Lo);
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// if signed map to unsigned space
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SDOperand OpMapped;
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if (isSigned) {
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// constant used to invert sign bit (signed to unsigned mapping)
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SDOperand SignBit = DAG.getConstant(0x80000000u, MVT::i32);
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OpMapped = DAG.getNode(ISD::XOR, MVT::i32, Op, SignBit);
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} else {
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OpMapped = Op;
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}
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// store the lo of the constructed double - based on integer input
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SDOperand Store1 = DAG.getStore(DAG.getEntryNode(),
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OpMapped, Lo, NULL, 0);
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// initial hi portion of constructed double
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SDOperand InitialHi = DAG.getConstant(0x43300000u, MVT::i32);
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// store the hi of the constructed double - biased exponent
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SDOperand Store2=DAG.getStore(Store1, InitialHi, Hi, NULL, 0);
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// load the constructed double
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SDOperand Load = DAG.getLoad(MVT::f64, Store2, StackSlot, NULL, 0);
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// FP constant to bias correct the final result
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SDOperand Bias = DAG.getConstantFP(isSigned ?
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BitsToDouble(0x4330000080000000ULL)
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: BitsToDouble(0x4330000000000000ULL),
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MVT::f64);
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// subtract the bias
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SDOperand Sub = DAG.getNode(ISD::FSUB, MVT::f64, Load, Bias);
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// final result
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SDOperand Result;
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// handle final rounding
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if (DestVT == MVT::f64) {
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// do nothing
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Result = Sub;
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} else if (MVT::getSizeInBits(DestVT) < MVT::getSizeInBits(MVT::f64)) {
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Result = DAG.getNode(ISD::FP_ROUND, DestVT, Sub,
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DAG.getIntPtrConstant(0));
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} else if (MVT::getSizeInBits(DestVT) > MVT::getSizeInBits(MVT::f64)) {
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Result = DAG.getNode(ISD::FP_EXTEND, DestVT, Sub);
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}
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return BitConvertToInteger(Result);
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}
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assert(!isSigned && "Legalize cannot Expand SINT_TO_FP for i64 yet");
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SDOperand Tmp1 = DAG.getNode(ISD::SINT_TO_FP, DestVT, Op);
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SDOperand SignSet = DAG.getSetCC(TLI.getSetCCResultType(Op), Op,
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DAG.getConstant(0, Op.getValueType()),
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ISD::SETLT);
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SDOperand Zero = DAG.getIntPtrConstant(0), Four = DAG.getIntPtrConstant(4);
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SDOperand CstOffset = DAG.getNode(ISD::SELECT, Zero.getValueType(),
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SignSet, Four, Zero);
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// If the sign bit of the integer is set, the large number will be treated
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// as a negative number. To counteract this, the dynamic code adds an
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// offset depending on the data type.
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uint64_t FF;
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switch (Op.getValueType()) {
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default: assert(0 && "Unsupported integer type!");
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case MVT::i8 : FF = 0x43800000ULL; break; // 2^8 (as a float)
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case MVT::i16: FF = 0x47800000ULL; break; // 2^16 (as a float)
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case MVT::i32: FF = 0x4F800000ULL; break; // 2^32 (as a float)
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case MVT::i64: FF = 0x5F800000ULL; break; // 2^64 (as a float)
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}
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if (TLI.isLittleEndian()) FF <<= 32;
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static Constant *FudgeFactor = ConstantInt::get(Type::Int64Ty, FF);
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SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy());
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CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset);
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SDOperand FudgeInReg;
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if (DestVT == MVT::f32)
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FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx,
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PseudoSourceValue::getConstantPool(), 0);
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else {
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FudgeInReg = DAG.getExtLoad(ISD::EXTLOAD, DestVT,
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DAG.getEntryNode(), CPIdx,
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PseudoSourceValue::getConstantPool(), 0,
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MVT::f32);
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}
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return BitConvertToInteger(DAG.getNode(ISD::FADD, DestVT, Tmp1, FudgeInReg));
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}
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//===----------------------------------------------------------------------===//
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// Operand Float to Integer Conversion..
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//===----------------------------------------------------------------------===//
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bool DAGTypeLegalizer::FloatToIntOperand(SDNode *N, unsigned OpNo) {
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DEBUG(cerr << "FloatToInt node operand " << OpNo << ": "; N->dump(&DAG);
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cerr << "\n");
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SDOperand Res(0, 0);
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// FIXME: Custom lowering for float-to-int?
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#if 0
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if (TLI.getOperationAction(N->getOpcode(), N->getOperand(OpNo).getValueType())
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== TargetLowering::Custom)
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Res = TLI.LowerOperation(SDOperand(N, 0), DAG);
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#endif
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if (Res.Val == 0) {
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switch (N->getOpcode()) {
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default:
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#ifndef NDEBUG
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cerr << "FloatToIntOperand Op #" << OpNo << ": ";
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N->dump(&DAG); cerr << "\n";
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#endif
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assert(0 && "Do not know how to convert this operator's operand!");
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abort();
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case ISD::BIT_CONVERT: Res = FloatToIntOp_BIT_CONVERT(N); break;
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}
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}
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// If the result is null, the sub-method took care of registering results etc.
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if (!Res.Val) return false;
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// If the result is N, the sub-method updated N in place. Check to see if any
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// operands are new, and if so, mark them.
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if (Res.Val == N) {
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// Mark N as new and remark N and its operands. This allows us to correctly
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// revisit N if it needs another step of promotion and allows us to visit
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// any new operands to N.
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ReanalyzeNode(N);
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return true;
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}
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assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
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"Invalid operand expansion");
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ReplaceValueWith(SDOperand(N, 0), Res);
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return false;
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}
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SDOperand DAGTypeLegalizer::FloatToIntOp_BIT_CONVERT(SDNode *N) {
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return DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0),
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GetIntegerOp(N->getOperand(0)));
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}
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