llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-21 16:31:16 +00:00

History

Dan Gohman da8ac5fd91 Avoid creating two TargetLowering objects for each target. Instead, just create one, and make sure everything that needs it can access it. Previously most of the SelectionDAGISel subclasses all had their own TargetLowering object, which was redundant with the TargetLowering object in the TargetMachine subclasses, except on Sparc, where SparcTargetMachine didn't have a TargetLowering object. Change Sparc to work more like the other targets here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57016 91177308-0d34-0410-b5e6-96231b3b80d8		2008-10-03 16:55:19 +00:00
..
Alpha.h	Use raw_ostream throughout the AsmPrinter.	2008-08-21 00:14:44 +00:00
Alpha.td
AlphaAsmPrinter.cpp	Switch the MachineOperand accessors back to the short names like	2008-10-03 15:45:36 +00:00
AlphaBranchSelector.cpp	Tidy up several unbeseeming casts from pointer to intptr_t.	2008-09-04 17:05:41 +00:00
AlphaCodeEmitter.cpp	Switch the MachineOperand accessors back to the short names like	2008-10-03 15:45:36 +00:00
AlphaInstrFormats.td
AlphaInstrInfo.cpp	Switch the MachineOperand accessors back to the short names like	2008-10-03 15:45:36 +00:00
AlphaInstrInfo.h	Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy requested	2008-08-26 18:03:31 +00:00
AlphaInstrInfo.td	Rename ConstantSDNode::getValue to getZExtValue, for consistency	2008-09-12 16:56:44 +00:00
AlphaISelDAGToDAG.cpp	Avoid creating two TargetLowering objects for each target.	2008-10-03 16:55:19 +00:00
AlphaISelLowering.cpp	Add "inreg" field to CallSDNode (doesn't increase	2008-09-26 19:31:26 +00:00
AlphaISelLowering.h	Add "inreg" field to CallSDNode (doesn't increase	2008-09-26 19:31:26 +00:00
AlphaJITInfo.cpp
AlphaJITInfo.h	Trim #includes.	2008-08-05 15:32:23 +00:00
AlphaLLRP.cpp	Tidy up several unbeseeming casts from pointer to intptr_t.	2008-09-04 17:05:41 +00:00
AlphaRegisterInfo.cpp	Switch the MachineOperand accessors back to the short names like	2008-10-03 15:45:36 +00:00
AlphaRegisterInfo.h
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetAsmInfo.cpp
AlphaTargetAsmInfo.h
AlphaTargetMachine.cpp	Use raw_ostream throughout the AsmPrinter.	2008-08-21 00:14:44 +00:00
AlphaTargetMachine.h	Use raw_ostream throughout the AsmPrinter.	2008-08-21 00:14:44 +00:00
CMakeLists.txt	CMake: Builds all targets.	2008-09-26 04:40:32 +00:00
Makefile
README.txt

README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html