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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
27 lines
990 B
LLVM
27 lines
990 B
LLVM
; RUN: llc < %s -mtriple armeb-eabi -mattr v7,neon -o - | FileCheck %s
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define void @vector_trunc_store_2i64_to_2i16( <2 x i64>* %loadaddr, <2 x i16>* %storeaddr ) {
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; CHECK-LABEL: vector_trunc_store_2i64_to_2i16:
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; CHECK: vmovn.i64 [[REG:d[0-9]+]]
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; CHECK: vrev32.16 [[REG]], [[REG]]
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; CHECK: vuzp.16 [[REG]], [[REG2:d[0-9]+]]
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; CHECK: vrev32.16 [[REG]], [[REG2]]
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%1 = load <2 x i64>, <2 x i64>* %loadaddr
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%2 = trunc <2 x i64> %1 to <2 x i16>
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store <2 x i16> %2, <2 x i16>* %storeaddr
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ret void
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}
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define void @vector_trunc_store_4i32_to_4i8( <4 x i32>* %loadaddr, <4 x i8>* %storeaddr ) {
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; CHECK-LABEL: vector_trunc_store_4i32_to_4i8:
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; CHECK: vmovn.i32 [[REG:d[0-9]+]]
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; CHECK: vrev16.8 [[REG]], [[REG]]
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; CHECK: vuzp.8 [[REG]], [[REG2:d[0-9]+]]
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; CHECK: vrev32.8 [[REG]], [[REG2]]
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%1 = load <4 x i32>, <4 x i32>* %loadaddr
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%2 = trunc <4 x i32> %1 to <4 x i8>
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store <4 x i8> %2, <4 x i8>* %storeaddr
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ret void
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}
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