mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-20 10:30:03 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
98 lines
3.1 KiB
LLVM
98 lines
3.1 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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declare i32 @llvm.r600.read.tidig.x() nounwind readnone
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declare double @fabs(double) readnone
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declare double @llvm.fabs.f64(double) readnone
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declare <2 x double> @llvm.fabs.v2f64(<2 x double>) readnone
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declare <4 x double> @llvm.fabs.v4f64(<4 x double>) readnone
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; FUNC-LABEL: {{^}}v_fabs_f64:
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; SI: v_and_b32
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; SI: s_endpgm
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define void @v_fabs_f64(double addrspace(1)* %out, double addrspace(1)* %in) {
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%tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone
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%tidext = sext i32 %tid to i64
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%gep = getelementptr double, double addrspace(1)* %in, i64 %tidext
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%val = load double, double addrspace(1)* %gep, align 8
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%fabs = call double @llvm.fabs.f64(double %val)
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store double %fabs, double addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}fabs_f64:
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; SI: v_and_b32
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; SI-NOT: v_and_b32
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; SI: s_endpgm
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define void @fabs_f64(double addrspace(1)* %out, double %in) {
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%fabs = call double @llvm.fabs.f64(double %in)
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store double %fabs, double addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}fabs_v2f64:
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; SI: v_and_b32
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; SI: v_and_b32
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; SI: s_endpgm
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define void @fabs_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %in) {
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%fabs = call <2 x double> @llvm.fabs.v2f64(<2 x double> %in)
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store <2 x double> %fabs, <2 x double> addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}fabs_v4f64:
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; SI: v_and_b32
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; SI: v_and_b32
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; SI: v_and_b32
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; SI: v_and_b32
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; SI: s_endpgm
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define void @fabs_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %in) {
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%fabs = call <4 x double> @llvm.fabs.v4f64(<4 x double> %in)
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store <4 x double> %fabs, <4 x double> addrspace(1)* %out
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ret void
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}
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; SI-LABEL: {{^}}fabs_fold_f64:
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; SI: s_load_dwordx2 [[ABS_VALUE:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xb
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; SI-NOT: and
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; SI: v_mul_f64 {{v\[[0-9]+:[0-9]+\]}}, |[[ABS_VALUE]]|, {{v\[[0-9]+:[0-9]+\]}}
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; SI: s_endpgm
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define void @fabs_fold_f64(double addrspace(1)* %out, double %in0, double %in1) {
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%fabs = call double @llvm.fabs.f64(double %in0)
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%fmul = fmul double %fabs, %in1
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store double %fmul, double addrspace(1)* %out
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ret void
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}
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; SI-LABEL: {{^}}fabs_fn_fold_f64:
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; SI: s_load_dwordx2 [[ABS_VALUE:s\[[0-9]+:[0-9]+\]]], {{s\[[0-9]+:[0-9]+\]}}, 0xb
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; SI-NOT: and
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; SI: v_mul_f64 {{v\[[0-9]+:[0-9]+\]}}, |[[ABS_VALUE]]|, {{v\[[0-9]+:[0-9]+\]}}
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; SI: s_endpgm
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define void @fabs_fn_fold_f64(double addrspace(1)* %out, double %in0, double %in1) {
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%fabs = call double @fabs(double %in0)
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%fmul = fmul double %fabs, %in1
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store double %fmul, double addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}fabs_free_f64:
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; SI: v_and_b32
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; SI: s_endpgm
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define void @fabs_free_f64(double addrspace(1)* %out, i64 %in) {
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%bc= bitcast i64 %in to double
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%fabs = call double @llvm.fabs.f64(double %bc)
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store double %fabs, double addrspace(1)* %out
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ret void
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}
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; FUNC-LABEL: {{^}}fabs_fn_free_f64:
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; SI: v_and_b32
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; SI: s_endpgm
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define void @fabs_fn_free_f64(double addrspace(1)* %out, i64 %in) {
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%bc= bitcast i64 %in to double
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%fabs = call double @fabs(double %bc)
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store double %fabs, double addrspace(1)* %out
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ret void
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}
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