mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-20 10:30:03 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
116 lines
5.7 KiB
LLVM
116 lines
5.7 KiB
LLVM
; REQUIRES: asserts
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; XFAIL: *
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; RUN: llc -O0 -verify-machineinstrs -asm-verbose=0 -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=COMMON %s
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; RUN: llc -O0 -verify-machineinstrs -asm-verbose=0 -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=COMMON %s
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; RUN: llc -O0 -verify-machineinstrs -asm-verbose=0 -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=COMMON %s
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; SI hits an assertion at -O0, evergreen hits a not implemented unreachable.
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; COMMON-LABEL: {{^}}branch_true:
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define void @branch_true(i8 addrspace(1)* nocapture %main, i32 %main_stride) #0 {
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entry:
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br i1 true, label %for.end, label %for.body.lr.ph
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for.body.lr.ph: ; preds = %entry
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%add.ptr.sum = shl i32 %main_stride, 1
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%add.ptr1.sum = add i32 %add.ptr.sum, %main_stride
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%add.ptr4.sum = shl i32 %main_stride, 2
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br label %for.body
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for.body: ; preds = %for.body, %for.body.lr.ph
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%main.addr.011 = phi i8 addrspace(1)* [ %main, %for.body.lr.ph ], [ %add.ptr6, %for.body ]
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%0 = bitcast i8 addrspace(1)* %main.addr.011 to i32 addrspace(1)*
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%1 = load i32, i32 addrspace(1)* %0, align 4
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%add.ptr = getelementptr inbounds i8, i8 addrspace(1)* %main.addr.011, i32 %main_stride
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%2 = bitcast i8 addrspace(1)* %add.ptr to i32 addrspace(1)*
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%3 = load i32, i32 addrspace(1)* %2, align 4
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%add.ptr1 = getelementptr inbounds i8, i8 addrspace(1)* %main.addr.011, i32 %add.ptr.sum
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%4 = bitcast i8 addrspace(1)* %add.ptr1 to i32 addrspace(1)*
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%5 = load i32, i32 addrspace(1)* %4, align 4
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%add.ptr2 = getelementptr inbounds i8, i8 addrspace(1)* %main.addr.011, i32 %add.ptr1.sum
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%6 = bitcast i8 addrspace(1)* %add.ptr2 to i32 addrspace(1)*
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%7 = load i32, i32 addrspace(1)* %6, align 4
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%add.ptr3 = getelementptr inbounds i8, i8 addrspace(1)* %main.addr.011, i32 %add.ptr4.sum
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%8 = bitcast i8 addrspace(1)* %add.ptr3 to i32 addrspace(1)*
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%9 = load i32, i32 addrspace(1)* %8, align 4
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%add.ptr6 = getelementptr inbounds i8, i8 addrspace(1)* %main.addr.011, i32 undef
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br i1 undef, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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ret void
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}
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; COMMON-LABEL: {{^}}branch_false:
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; SI: .text
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; SI-NEXT: s_endpgm
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define void @branch_false(i8 addrspace(1)* nocapture %main, i32 %main_stride) #0 {
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entry:
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br i1 false, label %for.end, label %for.body.lr.ph
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for.body.lr.ph: ; preds = %entry
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%add.ptr.sum = shl i32 %main_stride, 1
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%add.ptr1.sum = add i32 %add.ptr.sum, %main_stride
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%add.ptr4.sum = shl i32 %main_stride, 2
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br label %for.body
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for.body: ; preds = %for.body, %for.body.lr.ph
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%main.addr.011 = phi i8 addrspace(1)* [ %main, %for.body.lr.ph ], [ %add.ptr6, %for.body ]
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%0 = bitcast i8 addrspace(1)* %main.addr.011 to i32 addrspace(1)*
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%1 = load i32, i32 addrspace(1)* %0, align 4
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%add.ptr = getelementptr inbounds i8, i8 addrspace(1)* %main.addr.011, i32 %main_stride
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%2 = bitcast i8 addrspace(1)* %add.ptr to i32 addrspace(1)*
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%3 = load i32, i32 addrspace(1)* %2, align 4
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%add.ptr1 = getelementptr inbounds i8, i8 addrspace(1)* %main.addr.011, i32 %add.ptr.sum
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%4 = bitcast i8 addrspace(1)* %add.ptr1 to i32 addrspace(1)*
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%5 = load i32, i32 addrspace(1)* %4, align 4
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%add.ptr2 = getelementptr inbounds i8, i8 addrspace(1)* %main.addr.011, i32 %add.ptr1.sum
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%6 = bitcast i8 addrspace(1)* %add.ptr2 to i32 addrspace(1)*
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%7 = load i32, i32 addrspace(1)* %6, align 4
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%add.ptr3 = getelementptr inbounds i8, i8 addrspace(1)* %main.addr.011, i32 %add.ptr4.sum
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%8 = bitcast i8 addrspace(1)* %add.ptr3 to i32 addrspace(1)*
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%9 = load i32, i32 addrspace(1)* %8, align 4
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%add.ptr6 = getelementptr inbounds i8, i8 addrspace(1)* %main.addr.011, i32 undef
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br i1 undef, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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ret void
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}
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; COMMON-LABEL: {{^}}branch_undef:
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; SI: .text
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; SI-NEXT: s_endpgm
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define void @branch_undef(i8 addrspace(1)* nocapture %main, i32 %main_stride) #0 {
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entry:
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br i1 undef, label %for.end, label %for.body.lr.ph
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for.body.lr.ph: ; preds = %entry
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%add.ptr.sum = shl i32 %main_stride, 1
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%add.ptr1.sum = add i32 %add.ptr.sum, %main_stride
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%add.ptr4.sum = shl i32 %main_stride, 2
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br label %for.body
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for.body: ; preds = %for.body, %for.body.lr.ph
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%main.addr.011 = phi i8 addrspace(1)* [ %main, %for.body.lr.ph ], [ %add.ptr6, %for.body ]
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%0 = bitcast i8 addrspace(1)* %main.addr.011 to i32 addrspace(1)*
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%1 = load i32, i32 addrspace(1)* %0, align 4
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%add.ptr = getelementptr inbounds i8, i8 addrspace(1)* %main.addr.011, i32 %main_stride
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%2 = bitcast i8 addrspace(1)* %add.ptr to i32 addrspace(1)*
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%3 = load i32, i32 addrspace(1)* %2, align 4
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%add.ptr1 = getelementptr inbounds i8, i8 addrspace(1)* %main.addr.011, i32 %add.ptr.sum
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%4 = bitcast i8 addrspace(1)* %add.ptr1 to i32 addrspace(1)*
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%5 = load i32, i32 addrspace(1)* %4, align 4
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%add.ptr2 = getelementptr inbounds i8, i8 addrspace(1)* %main.addr.011, i32 %add.ptr1.sum
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%6 = bitcast i8 addrspace(1)* %add.ptr2 to i32 addrspace(1)*
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%7 = load i32, i32 addrspace(1)* %6, align 4
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%add.ptr3 = getelementptr inbounds i8, i8 addrspace(1)* %main.addr.011, i32 %add.ptr4.sum
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%8 = bitcast i8 addrspace(1)* %add.ptr3 to i32 addrspace(1)*
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%9 = load i32, i32 addrspace(1)* %8, align 4
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%add.ptr6 = getelementptr inbounds i8, i8 addrspace(1)* %main.addr.011, i32 undef
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br i1 undef, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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ret void
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}
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attributes #0 = { nounwind }
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