llvm-6502/test/CodeGen/X86/live-out-reg-info.ll
Dan Gohman 07c26ee87e Fix live-out reg logic to not insert over-aggressive AssertZExt
instructions. This fixes lua.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68083 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 01:38:29 +00:00

21 lines
416 B
LLVM

; RUN: llvm-as < %s | llc -march=x86-64 | grep testl
; Make sure dagcombine doesn't eliminate the comparison due
; to an off-by-one bug with ComputeMaskedBits information.
declare void @qux()
define void @foo(i32 %a) {
%t0 = lshr i32 %a, 23
br label %next
next:
%t1 = and i32 %t0, 256
%t2 = icmp eq i32 %t1, 0
br i1 %t2, label %true, label %false
true:
call void @qux()
ret void
false:
ret void
}