llvm-6502/test/CodeGen/ARM/thumb2-it-block.ll
Joerg Sonnenberger aca2998f14 Enabling thumb2 mode used to force support for armv6t2. Replace this
with a temporary assertion and adjust the various test cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197224 91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-13 11:16:00 +00:00

22 lines
571 B
LLVM

; RUN: llc < %s -march=thumb -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s
; RUN: llc < %s -mtriple=thumbv8 | FileCheck %s
; PR11107
define i32 @test(i32 %a, i32 %b) {
entry:
; CHECK: cmp
; CHECK-NEXT: it mi
; CHECK-NEXT: rsb{{s?}}mi
; CHECK-NEXT: cmp
; CHECK-NEXT: it mi
; CHECK-NEXT: rsb{{s?}}mi
%cmp1 = icmp slt i32 %a, 0
%sub1 = sub nsw i32 0, %a
%abs1 = select i1 %cmp1, i32 %sub1, i32 %a
%cmp2 = icmp slt i32 %b, 0
%sub2 = sub nsw i32 0, %b
%abs2 = select i1 %cmp2, i32 %sub2, i32 %b
%add = add nsw i32 %abs1, %abs2
ret i32 %add
}