llvm-6502/test/CodeGen
Eli Friedman 2a6d9eb10b Change this DAGCombine to build AND of SHR instead of SHR of AND; this matches the ordering we prefer in instcombine. Part of rdar://9562809.
The potential DAGCombine which enforces this more generally messes up some other very fragile patterns, so I'm leaving that alone, at least for now.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132809 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-09 22:14:44 +00:00
..
Alpha
ARM Another possible bug. Stopgap until we can autogenerate tables and 2011-06-03 22:09:12 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic Move the legalizer tests to the X86 directory because the test uses the x86 2011-06-07 05:23:58 +00:00
MBlaze
Mips Speculatively revert 132758 and 132768 to try to fix the Windows buildbots. 2011-06-09 16:03:19 +00:00
MSP430
PowerPC Fix wrong usages of CTR/MCTR where CTR8/MCTR8 was meant. 2011-06-03 15:47:49 +00:00
PTX
SPARC
SystemZ
Thumb
Thumb2 Fix an issue where the two-address conversion pass incorrectly rewrites untied 2011-06-07 23:54:00 +00:00
X86 Change this DAGCombine to build AND of SHR instead of SHR of AND; this matches the ordering we prefer in instcombine. Part of rdar://9562809. 2011-06-09 22:14:44 +00:00
XCore Add XCore intrinsic for crc8. 2011-05-31 16:24:49 +00:00