mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-14 04:57:33 +00:00
2a821601f1
no fixes physreg. Treat this as permission to use any register in the register
class. When this happens and it is safe, allow the llvm register allcoator to
allocate the register instead of doing it at isel time. This eliminates a ton
of copies around common inline asms. For example:
int test2(int Y, int X) {
asm("foo %0, %1" : "=r"(X): "r"(X));
return X;
}
now compiles to:
_test2:
foo r3, r4
blr
instead of:
_test2:
mr r2, r4
foo r2, r2
mr r3, r2
blr
GCC produces:
_test2:
foo r4, r4
mr r3,r4
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31366 91177308-0d34-0410-b5e6-96231b3b80d8
|
||
|---|---|---|
| .. | ||
| DAGCombiner.cpp | ||
| LegalizeDAG.cpp | ||
| Makefile | ||
| ScheduleDAG.cpp | ||
| ScheduleDAGList.cpp | ||
| ScheduleDAGRRList.cpp | ||
| ScheduleDAGSimple.cpp | ||
| SelectionDAG.cpp | ||
| SelectionDAGISel.cpp | ||
| SelectionDAGPrinter.cpp | ||
| TargetLowering.cpp | ||