Files
llvm-6502/lib/Target/PowerPC/PPCInstr64Bit.td
T
Ulrich Weigand 1fb54cfb0a PowerPC: Mark some more patterns as isCodeGenOnly.
A couple of recently introduced conditional branch patterns
also need to be marked as isCodeGenOnly since they cannot
be handled by the asm parser.

No change in generated code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179690 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17 17:19:05 +00:00

45 KiB