Sanjiv Gupta 917283a418 Fixed llc crash for zext (i1 -> i8) loads. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92201 91177308-0d34-0410-b5e6-96231b3b80d8		2009-12-28 04:53:24 +00:00
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Alpha
ARM	Handle ARM inline asm "w" constraints with 64-bit ("d") registers.	2009-12-18 01:03:29 +00:00
Blackfin
CBackend
CellSPU	Revert this dag combine change:	2009-12-17 00:40:05 +00:00
CPP
Generic	While this test is testing a problem in the generic part of codegen,	2009-11-27 16:04:14 +00:00
Mips	Support PIC loading of constant pool entries	2009-11-25 12:17:58 +00:00
MSP430	Use more sensible type for flags in asms. PR 5570.	2009-12-23 07:32:51 +00:00
PIC16	Fixed llc crash for zext (i1 -> i8) loads.	2009-12-28 04:53:24 +00:00
PowerPC	Do better with physical reg operands (typically, from inline asm)	2009-12-16 00:29:41 +00:00
SPARC
SystemZ
Thumb	Add test case for the phi reuse patch.	2009-12-18 00:11:44 +00:00
Thumb2	Make this test pass on Linux.	2009-12-16 07:35:25 +00:00
X86	handle equality memcmp of 8 bytes on x86-64 with two unaligned loads and a	2009-12-24 01:07:17 +00:00
XCore	Add XCore support for indirectbr / blockaddress.	2009-11-18 23:20:42 +00:00