Oliver Stannard 00e0b8a016 [ARM] NEON 32-bit scalar moves are also available in VFPv2 ... The 32-bit variants of the NEON scalar<->GPR move instructions are also available in VFPv2. The 8- and 16-bit variants do require NEON. Note that the checks in the test file are all -DAG because they are checking a mixture of stdout and stderr, and the ordering is not guaranteed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220288 91177308-0d34-0410-b5e6-96231b3b80d8		2014-10-21 11:49:14 +00:00
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AArch64
ARM	[ARM] NEON 32-bit scalar moves are also available in VFPv2	2014-10-21 11:49:14 +00:00
AsmParser
COFF	MC, COFF: Make bigobj test compatible with python3	2014-10-14 22:35:11 +00:00
Disassembler
ELF	Add back commits r219835 and a fixed version of r219829.	2014-10-17 01:48:58 +00:00
MachO
Markup
Mips	[mips][microMIPS] Implement ADDU16 and SUBU16 instructions	2014-10-21 08:44:58 +00:00
PowerPC	[PPC64] VSX indexed-form loads use wrong instruction format	2014-10-09 17:51:35 +00:00
Sparc
SystemZ
X86	[AVX512] Add DQ subvector inserts	2014-10-15 23:42:17 +00:00