Adam Nemet fb9d61a8d6 [AVX512] Add DQ subvector inserts ... In AVX512f we support 64x2 and 32x8 inserts via matching them to 32x4 and 64x4 respectively. These are matched by "Alt" Pat<>'s (Alt stands for alternative VTs). Since DQ has native support for these intructions, I peeled off the non-"Alt" part of the baseclass into vinsert_for_size_no_alt. The DQ instructions are derived from this multiclass. The "Alt" Pat<>'s are disabled with DQ. Fixes <rdar://problem/18426089> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219874 91177308-0d34-0410-b5e6-96231b3b80d8		2014-10-15 23:42:17 +00:00
..
AlignedBundling	[MC] Make bundle alignment mode setting idempotent and support nested bundles	2014-10-15 17:10:04 +00:00
3DNow.s
2011-09-06-NoNewline.s
address-size.s
avx512-encodings.s	[AVX512] Add DQ subvector inserts	2014-10-15 23:42:17 +00:00
cfi_def_cfa-crash.s
fde-reloc.s
fixup-cpu-mode.s
gnux32-dwarf-gen.s
index-operations.s
intel-syntax-2.s	MC X86: Accept ".att_syntax prefix" and diagnose noprefix	2014-08-06 23:21:13 +00:00
intel-syntax-ambiguous.s	X86 MC: Handle instructions like fxsave that match multiple operand sizes	2014-08-27 20:10:38 +00:00
intel-syntax-avx512.s
intel-syntax-bitwise-ops.s
intel-syntax-directional-label.s
intel-syntax-encoding.s
intel-syntax-error.s	Add missing test for r215031	2014-08-11 18:34:54 +00:00
intel-syntax-hex.s
intel-syntax-invalid-basereg.s
intel-syntax-invalid-scale.s
intel-syntax-ptr-sized.s	MC: Split the x86 asm matcher implementations by dialect	2014-08-26 20:32:34 +00:00
intel-syntax.s	MC: Use @IMGREL instead of @IMGREL32, which we can't parse	2014-09-25 02:09:18 +00:00
lit.local.cfg
macho-uleb.s	Remove HasLEB128.	2014-08-15 14:01:07 +00:00
no-elf-compact-unwind.s
padlock.s
relax-insn.s
reloc-undef-global.s
ret.s
sgx-encoding.s	Add support for the X86 secure guard extensions instructions in assembler (SGX).	2014-07-31 23:57:38 +00:00
shuffle-comments.s
stackmap-nops.ll	[X86] Add comments to clarify some non-obvious lines in the stackmap-nops.ll	2014-07-25 04:50:08 +00:00
variant-diagnostics.s
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s
x86_64-bmi-encoding.s
x86_64-encoding.s
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s
x86_64-hle-encoding.s
x86_64-imm-widths.s
x86_64-rand-encoding.s
x86_64-rtm-encoding.s
x86_64-signed-reloc.s
x86_64-sse4a.s
x86_64-tbm-encoding.s
x86_64-xop-encoding.s
x86_directives.s
x86_errors.s	X86 MC: Reject invalid segment registers before a memory operand colon	2014-07-31 23:03:22 +00:00
x86_long_nop.s
x86_nop.s
x86_operands.s	X86 MC: Don't crash on empty memory operand parens	2014-07-31 23:26:35 +00:00
x86-16.s
x86-32-avx.s
x86-32-coverage.s	[x86] Fix a pretty horrible bug and inconsistency in the x86 asm	2014-09-06 10:00:01 +00:00
x86-32-fma3.s
x86-32-ms-inline-asm.s	[x86 asm] allow fwait alias in both At&t and Intel modes (PR21208)	2014-10-14 21:41:17 +00:00
x86-32.s
x86-64-avx512bw_vl.s	[AVX512] Extended avx512_binop_rm to BW/VL subsets.	2014-10-14 14:36:19 +00:00
x86-64-avx512bw.s	[AVX512] Extended avx512_binop_rm to BW/VL subsets.	2014-10-14 14:36:19 +00:00
x86-64-avx512dq_vl.s	[AVX512] Extended avx512_binop_rm to DQ/VL subsets.	2014-10-14 15:13:56 +00:00
x86-64-avx512dq.s	[AVX512] Extended avx512_binop_rm to DQ/VL subsets.	2014-10-14 15:13:56 +00:00
x86-64-avx512f_vl.s	[AVX512] Extended avx512_binop_rm for AVX512VL subsets.	2014-10-09 08:38:48 +00:00
x86-64.s
x86-itanium.ll
x86-target-directives.s
x86-windows-itanium-libcalls.ll	X86: correct library call setup for Windows itanium	2014-07-24 17:46:36 +00:00