..
AsmParser
R600/SI: Use a better error message for unsupported instructions in the assembler
2015-04-23 19:33:51 +00:00
InstPrinter
MCTargetDesc
[mc] Clean up emission of byte sequences
2015-04-17 11:12:43 +00:00
TargetInfo
AMDGPU.h
AMDGPU.td
R600/SI: Add assembler support for all CI and VI VOP1 instructions
2015-04-23 19:33:54 +00:00
AMDGPUAlwaysInlinePass.cpp
R600: Fix always inline pass breaking noinline functions
2015-04-22 17:10:44 +00:00
AMDGPUAsmPrinter.cpp
[AsmPrinter] Make AsmPrinter's OutStreamer member a unique_ptr.
2015-04-24 19:11:51 +00:00
AMDGPUAsmPrinter.h
AMDGPUCallingConv.td
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h
AMDGPUInstrInfo.cpp
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td
Revert revisions r234755, r234759, r234760
2015-04-13 17:47:15 +00:00
AMDGPUInstructions.td
AMDGPUIntrinsicInfo.cpp
AMDGPUIntrinsicInfo.h
AMDGPUIntrinsics.td
AMDGPUISelDAGToDAG.cpp
AMDGPUISelLowering.cpp
R600: Correctly lower CONCAT_VECTOR nodes with more than 2 operands
2015-04-23 22:59:24 +00:00
AMDGPUISelLowering.h
Revert revisions r234755, r234759, r234760
2015-04-13 17:47:15 +00:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMCInstLower.cpp
[AsmPrinter] Make AsmPrinter's OutStreamer member a unique_ptr.
2015-04-24 19:11:51 +00:00
AMDGPUMCInstLower.h
AMDGPUPromoteAlloca.cpp
AMDGPURegisterInfo.cpp
AMDGPURegisterInfo.h
AMDGPURegisterInfo.td
AMDGPUSubtarget.cpp
R600/SI: Add assembler support for all CI and VI VOP1 instructions
2015-04-23 19:33:54 +00:00
AMDGPUSubtarget.h
R600/SI: Add assembler support for all CI and VI VOP1 instructions
2015-04-23 19:33:54 +00:00
AMDGPUTargetMachine.cpp
AMDGPUTargetMachine.h
AMDGPUTargetTransformInfo.cpp
AMDGPUTargetTransformInfo.h
AMDILCFGStructurizer.cpp
AMDKernelCodeT.h
CaymanInstructions.td
CIInstructions.td
R600/SI: Add assembler support for all CI and VI VOP1 instructions
2015-04-23 19:33:54 +00:00
CMakeLists.txt
EvergreenInstructions.td
Revert revisions r234755, r234759, r234760
2015-04-13 17:47:15 +00:00
LLVMBuild.txt
Makefile
Processors.td
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
R600InstrFormats.td
R600InstrInfo.cpp
R600InstrInfo.h
R600Instructions.td
R600: Make FMIN/MAXNUM legal on all asics
2015-04-12 23:45:05 +00:00
R600Intrinsics.td
R600ISelLowering.cpp
Revert revisions r234755, r234759, r234760
2015-04-13 17:47:15 +00:00
R600ISelLowering.h
Revert revisions r234755, r234759, r234760
2015-04-13 17:47:15 +00:00
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp
R600RegisterInfo.cpp
R600RegisterInfo.h
R600RegisterInfo.td
R600Schedule.td
R600TextureIntrinsicsReplacer.cpp
R700Instructions.td
SIAnnotateControlFlow.cpp
R600/SI: Fix verifier error caused by SIAnnotateControlFlow
2015-04-14 14:36:45 +00:00
SIDefines.h
SIFixSGPRCopies.cpp
SIFixSGPRLiveRanges.cpp
SIFoldOperands.cpp
SIInsertWaits.cpp
SIInstrFormats.td
SIInstrInfo.cpp
R600/SI: Fix verifier error when producing v_madmk_f32
2015-04-24 01:57:58 +00:00
SIInstrInfo.h
R600/SI: Special case v_mov_b32 as really rematerializable
2015-04-23 23:34:48 +00:00
SIInstrInfo.td
R600/SI: Add assembler support for all CI and VI VOP1 instructions
2015-04-23 19:33:54 +00:00
SIInstructions.td
R600/RegisterCoalescer: Enable more rematerialization/add missing testcase
2015-04-24 00:25:50 +00:00
SIIntrinsics.td
SIISelLowering.cpp
R600: Make FMIN/MAXNUM legal on all asics
2015-04-12 23:45:05 +00:00
SIISelLowering.h
SILoadStoreOptimizer.cpp
SILowerControlFlow.cpp
R600/SI: Fix indirect addressing with a negative constant offset
2015-04-23 20:32:01 +00:00
SILowerI1Copies.cpp
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h
SIPrepareScratchRegs.cpp
SIRegisterInfo.cpp
SIRegisterInfo.h
SIRegisterInfo.td
SISchedule.td
SIShrinkInstructions.cpp
SITypeRewriter.cpp
VIInstrFormats.td
VIInstructions.td
R600/SI: Add assembler support for all CI and VI VOP1 instructions
2015-04-23 19:33:54 +00:00
