Evan Cheng c9dfeb1be8 Identity copies should not contribute to spill weight. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84978 91177308-0d34-0410-b5e6-96231b3b80d8

2009-10-23 23:09:19 +00:00

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SubtargetFeature.h

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Target.td

Add instruction flags: hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. When

2009-10-01 08:21:18 +00:00

TargetAsmParser.h

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TargetCallingConv.td

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TargetData.h

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TargetELFWriterInfo.h

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TargetFrameInfo.h

Use explicit structs instead of std::pair to map callee saved regs to spill slots.

2009-09-27 17:58:47 +00:00

TargetInstrDesc.h

Add instruction flags: hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. When

2009-10-01 08:21:18 +00:00

TargetInstrInfo.h

Identity copies should not contribute to spill weight.

2009-10-23 23:09:19 +00:00

TargetInstrItineraries.h

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TargetIntrinsicInfo.h

Clean up TargetIntrinsicInfo API. Add pure virtual methods.

2009-10-15 18:49:26 +00:00

TargetJITInfo.h

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TargetLowering.h

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TargetLoweringObjectFile.h

Use OutStreamer.SwitchSection instead of writing out textual section directives.

2009-09-30 22:25:37 +00:00

TargetMachine.h

Add a CodeGenOpt::Less level to match -O1. It'll be used by clients which do not want post-regalloc scheduling.

2009-10-16 21:02:20 +00:00

TargetMachOWriterInfo.h

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TargetOptions.h

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TargetRegisterInfo.h

Adjust the scavenge register spilling to allow the target to choose an

2009-10-19 22:27:30 +00:00

TargetRegistry.h

Wire up the ARM MCInst printer, for llvm-mc.

2009-10-20 05:15:36 +00:00

TargetSchedule.td

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TargetSelect.h

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TargetSelectionDAG.td

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TargetSubtarget.h

Allow the target to select the level of anti-dependence breaking that should be performed by the post-RA scheduler. The default is none.

2009-10-22 23:19:17 +00:00