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2bb06b0002
llvm-6502
/
test
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MC
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X86
History
Craig Topper
2bb06b0002
Move address override handling in X86MCCodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode.
...
git-svn-id:
https://llvm.org/svn/llvm-project/llvm/trunk@200516
91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-31 05:33:45 +00:00
..
AlignedBundling
3DNow.s
2011-09-06-NoNewline.s
address-size.s
avx512-encodings.s
cfi_def_cfa-crash.s
fde-reloc.s
fixup-cpu-mode.s
Tests for mode switching
2014-01-28 23:13:30 +00:00
gnux32-dwarf-gen.s
index-operations.s
[x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385)
2014-01-22 15:08:55 +00:00
intel-syntax-2.s
intel-syntax-avx512.s
intel-syntax-bitwise-ops.s
intel-syntax-directional-label.s
intel-syntax-encoding.s
intel-syntax-hex.s
intel-syntax-invalid-basereg.s
Update the X86 assembler for .intel_syntax to produce an error for invalid base
2014-01-23 22:34:42 +00:00
intel-syntax-invalid-scale.s
Update the X86 assembler for .intel_syntax to produce an error for invalid
2014-01-23 21:52:41 +00:00
intel-syntax.s
lit.local.cfg
padlock.s
relax-insn.s
ret.s
[x86] Support i386-*-*-code16 triple for emitting 16-bit code
2014-01-20 12:02:25 +00:00
shuffle-comments.s
stackmap-nops.ll
variant-diagnostics.s
MC: fix test locations/name
2014-01-26 22:55:02 +00:00
x86_64-avx-clmul-encoding.s
x86_64-avx-encoding.s
Move address override handling in X86MCCodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode.
2014-01-31 05:33:45 +00:00
x86_64-bmi-encoding.s
x86_64-encoding.s
x86_64-fma3-encoding.s
x86_64-fma4-encoding.s
x86_64-hle-encoding.s
x86_64-imm-widths.s
x86_64-rand-encoding.s
x86_64-rtm-encoding.s
x86_64-signed-reloc.s
[x86] Fix signed relocations for i64i32imm operands
2014-01-30 22:20:41 +00:00
x86_64-sse4a.s
x86_64-tbm-encoding.s
Move address override handling in X86MCCodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode.
2014-01-31 05:33:45 +00:00
x86_64-xop-encoding.s
x86_directives.s
x86_errors.s
x86_long_nop.s
x86_nop.s
x86_operands.s
x86-16.s
[x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385)
2014-01-22 15:08:55 +00:00
x86-32-avx.s
x86-32-coverage.s
x86-32-fma3.s
x86-32-ms-inline-asm.s
x86-32.s
[x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385)
2014-01-22 15:08:55 +00:00
x86-64.s
[x86] Allow segment and address-size overrides for INS[BWLQ] (PR9385)
2014-01-22 15:08:55 +00:00
x86-target-directives.s